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Message-ID: <532714AE.2040206@gmail.com>
Date: Mon, 17 Mar 2014 16:28:46 +0100
From: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
To: Antoine Ténart
<antoine.tenart@...e-electrons.com>
CC: alexandre.belloni@...e-electrons.com, zmxu@...vell.com,
jszhang@...vell.com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500
pro
On 03/17/2014 04:06 PM, Antoine Ténart wrote:
> Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
> The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
> timer, apb timers and uarts for now.
>
> Signed-off-by: Antoine Ténart <antoine.tenart@...e-electrons.com>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
> ---
> arch/arm/boot/dts/berlin2q.dtsi | 210 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 210 insertions(+)
> create mode 100644 arch/arm/boot/dts/berlin2q.dtsi
>
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> new file mode 100644
> index 000000000000..7a50267b1044
> --- /dev/null
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
[...]
> +
> + smclk: sysmgr-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + };
> +
Antoine,
sorry I missed it the first time. Please add:
+ cfgclk: config-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+
> + cpuclk: cpu-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <1200000000>;
> + };
> +
> + sysclk: system-clock {
> + compatible = "fixed-factor-clock";
> + #clock-cells = <0>;
> + clocks = <&cpuclk>;
> + clock-multi = <1>;
> + clock-div = <3>;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + ranges = <0 0xf7000000 0x1000000>;
> + interrupt-parent = <&gic>;
> +
> + l2: l2-cache-controller@...000 {
> + compatible = "arm,pl310-cache";
> + reg = <0xac0000 0x1000>;
> + cache-level = <2>;
> + };
> +
> + local-timer@...600 {
> + compatible = "arm,cortex-a9-twd-timer";
> + reg = <0xad0600 0x20>;
> + clocks = <&sysclk>;
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + gic: interrupt-controller@...000 {
> + compatible = "arm,cortex-a9-gic";
> + reg = <0xad1000 0x1000>, <0xad0100 0x100>;
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + };
> +
> + apb@...000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + ranges = <0 0xe80000 0x10000>;
> + interrupt-parent = <&aic>;
> +
> + timer0: timer@...0 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c00 0x14>;
> + interrupts = <8>;
> + clock-freq = <100000000>;
replace this and all below with:
clocks = <&cfgclk>;
> + };
> +
> + timer1: timer@...4 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c14 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer2: timer@...8 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c28 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer3: timer@...c {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c3c 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer4: timer@...0 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c50 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer5: timer@...4 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c64 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer6: timer@...8 {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c78 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
> + timer7: timer@...c {
> + compatible = "snps,dw-apb-timer";
> + reg = <0x2c8c 0x14>;
> + clock-freq = <100000000>;
> + status = "disabled";
> + };
> +
[...]
> +
> + uart0: uart@...0 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x9000 0x100>;
> + interrupt-parent = <&sic>;
> + interrupts = <8>;
> + clock-frequency = <25000000>;
and clocks = <&smclk> here and below.
> + reg-shift = <2>;
> + status = "disabled";
> + };
> +
> + uart1: uart@...0 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0xa000 0x100>;
> + interrupt-parent = <&sic>;
> + interrupts = <9>;
> + clock-frequency = <25000000>;
> + reg-shift = <2>;
> + status = "disabled";
> + };
Apart from it, this really looks good and I'll pick it up
as soon as I have setup git branches.
Sebastian
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