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Message-ID: <CACRpkdZ+OG0FXkgnkdiyhRobSvo+9=ouXc6qes_UCGhitFhTXQ@mail.gmail.com>
Date: Tue, 13 May 2014 10:45:24 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Olof Johansson <olof@...om.net>
Cc: Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
Alan Tull <atull@...era.com>,
Alexandre Courbot <gnurou@...il.com>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Dinh Nguyen <dinguyen@...era.com>,
Alan Tull <delicious.quinoa@...il.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH 1/7] ARM: dts: socfpga: add gpio pieces
On Tue, May 6, 2014 at 12:02 AM, Olof Johansson <olof@...om.net> wrote:
> ... or is there some underlying reason for having the two-layer
> approach that isn't obvious from this device tree?
There is, as explained by Alan. One coherent memory range with
several individual ports.
Yours,
Linus Walleij
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