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Date:	Fri, 20 Jun 2014 01:31:21 +0530
From:	Jassi Brar <jaswinder.singh@...aro.org>
To:	Bjorn Andersson <bjorn@...o.se>
Cc:	Kevin Hilman <khilman@...aro.org>,
	Kumar Gala <galak@...eaurora.org>,
	Lee Jones <lee.jones@...aro.org>,
	Bjorn Andersson <bjorn.andersson@...ymobile.com>,
	Rob Herring <robh+dt@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Liam Girdwood <lgirdwood@...il.com>,
	Mark Brown <broonie@...nel.org>,
	Josh Cartwright <joshc@...eaurora.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	linux-arm-msm <linux-arm-msm@...r.kernel.org>,
	Paul Walmsley <paul@...an.com>
Subject: Re: [PATCH v3 0/3] Qualcomm Resource Power Manager driver

On 19 June 2014 23:52, Bjorn Andersson <bjorn@...o.se> wrote:
> On Wed, Jun 18, 2014 at 8:55 PM, Jassi Brar <jaswinder.singh@...aro.org> wrote:
>> On 18 June 2014 22:14, Kevin Hilman <khilman@...aro.org> wrote:
> [...]
>>> Thinking more about what this RPM driver actually does, and since you
>>> mentioned patterns across SoCs, it seems to me the RPM driver bascially
>>> just doing the IPC.
>>>
>>> So, rather than MFD or drivers/soc, it seems to me that it should be
>>> implmented as a controller in the new common mailbox framwork[1] being
>>> worked on by Jassi Brar (added to Cc.)
>>>
>>> IIUC, RPM is actually only doing one-way IPC (it only exposes a write()
>>> interface to clients) so it seems like a rather simple implementation of
>>> a mailbox controller.
>>>
>> Yup, qcom_rpm.c is exactly what drivers/mailbox/ is meant for.
>>
>
> The RPM provides a register file with 80ish registers of variable size, to
> program the hardware you write to these registers. Then you write to a register
> selector register and then signal an outgoing interrupt.
>
For mailbox_request_channel(), you have dev_get_qcom_rpm()  and
qcom_rpm_write() for mbox_send_message()
Rest all is what you need to fire off a message to remote or register
for interrupts. So nothing new to me.

> That is, the interface exposed to the kernel by the SoC is not an mailbox like
> interface.
>
 I don't understand how having to program 80 registers makes it "not
like mailbox"?
 I have used mailbox api to pass messages between CPUs (using PPI)
under same instance of Linux and otoh I think it could also support
IPC over gpio (if someone gets that desperate).
Mailbox isn't about how you program the h/w. Do whatever is needed to
send a message across.

BTW I haven't looked closely, but probably you could push the data tables in DT?

Cheers
-Jassi
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