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Message-Id: <1405443709-15288-36-git-send-email-asadi.samuel@gmail.com>
Date: Tue, 15 Jul 2014 20:00:51 +0300
From: Sam Asadi <asadi.samuel@...il.com>
To: gregkh@...uxfoundation.org
Cc: devel@...verdev.osuosl.org, linux-kernel@...r.kernel.org,
Roger Quadros <rogerq@...com>, Paul Walmsley <paul@...an.com>,
sam-the-6 <asadi.samuel@...il.com>
Subject: [PATCH 36/94] ARM: DRA7: hwmod: Fixup SATA hwmod
From: Roger Quadros <rogerq@...com>
Get rid of optional clock as that is now managed by the
AHCI platform driver.
Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..)
is passed as the second memory resource in the device tree.
Signed-off-by: Roger Quadros <rogerq@...com>
Reviewed-by: Rajendra Nayak <rnayak@...com>
Tested-by: Sekhar Nori <nsekhar@...com>
Signed-off-by: Paul Walmsley <paul@...an.com>
Signed-off-by: sam-the-6 <asadi.samuel@...il.com>
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398..1209266 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1268,9 +1268,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
};
/* sata */
-static struct omap_hwmod_opt_clk sata_opt_clks[] = {
- { .role = "ref_clk", .clk = "sata_ref_clk" },
-};
static struct omap_hwmod dra7xx_sata_hwmod = {
.name = "sata",
@@ -1278,6 +1275,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.clkdm_name = "l3init_clkdm",
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk = "func_48m_fclk",
+ .mpu_rt_idx = 1,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1283,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
- .opt_clks = sata_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(sata_opt_clks),
};
/*
--
1.7.10.4
--
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