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Message-ID: <CALCETrXc-ecEt6mMuZee=MaoHD77XPWhjAJJUOgeXkcNZhC=Og@mail.gmail.com>
Date: Wed, 10 Sep 2014 13:08:38 -0700
From: Andy Lutomirski <luto@...capital.net>
To: Toshi Kani <toshi.kani@...com>
Cc: "H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Arnd Bergmann <arnd@...db.de>,
"linux-mm@...ck.org" <linux-mm@...ck.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Juergen Gross <jgross@...e.com>,
Stefan Bader <stefan.bader@...onical.com>,
Henrique de Moraes Holschuh <hmh@....eng.br>,
Yigal Korman <yigal@...xistor.com>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
Subject: Re: [PATCH v2 3/6] x86, mm, asm-gen: Add ioremap_wt() for WT
On Wed, Sep 10, 2014 at 12:40 PM, Toshi Kani <toshi.kani@...com> wrote:
> On Wed, 2014-09-10 at 11:29 -0700, Andy Lutomirski wrote:
>> On Wed, Sep 10, 2014 at 9:51 AM, Toshi Kani <toshi.kani@...com> wrote:
> :
>> > +#ifndef ARCH_HAS_IOREMAP_WT
>> > +#define ioremap_wt ioremap_nocache
>> > +#endif
>> > +
>>
>> This is a little bit sad. I wouldn't be too surprised if there are
>> eventually users who prefer WC or WB over UC if WT isn't available
>> (and they'll want a corresponding way to figure out what kind of fence
>> to use).
>
> Right, this redirection is not ideal for the performance, but it is done
> this way for the correctness. WT & UC have strongly ordered writes, but
> WB & WC do not.
Fair enough. I think that this is unlikely to ever matter on x86, but
it might if NV-DIMMs end up used on another architecture w/o WT (or on
Xen, perhaps). Your code is certainly fine from a correctness POV.
Aside: WB writes are IIRC even more strongly ordered than WC.
>
> Thanks,
> -Toshi
>
--
Andy Lutomirski
AMA Capital Management, LLC
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