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Message-ID: <20141204183406.GK7944@katana>
Date: Thu, 4 Dec 2014 19:34:07 +0100
From: Wolfram Sang <wsa@...-dreams.de>
To: Harini Katakam <harinik@...inx.com>
Cc: mark.rutland@....com, michal.simek@...inx.com,
soren.brinkmann@...inx.com, linux-arm-kernel@...ts.infradead.org,
linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
vishnum@...inx.com, harinikatakamlinux@...il.com
Subject: Re: [PATCH v2 3/3] i2c: cadence: Check for errata condition
involving master receive
> + /*
> + * This controller does not give completion interrupt after a
> + * master receive transfer if HOLD bit is set (repeated start),
> + * resulting in SW timeout. Hence, if a receive transfer is
> + * followed by any other transfer, an error is returned
> + * indicating that this sequence is not supported.
> + */
> + for (count = 0; count < num-1; count++) {
> + if (msgs[count].flags & I2C_M_RD)
> + return -EOPNOTSUPP;
> + }
Yeah, a lot better. Probably it would be good to inform the user with a
warning what went wrong?
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