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Message-ID: <20150213221314.GC25281@psi-dev26.jf.intel.com>
Date: Fri, 13 Feb 2015 14:13:14 -0800
From: David Cohen <david.a.cohen@...ux.intel.com>
To: Felipe Balbi <balbi@...com>
Cc: Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Baolu Lu <baolu.lu@...ux.intel.com>, linux-usb@...r.kernel.org,
linux-kernel@...r.kernel.org,
Kishon Vijay Abraham I <kishon@...com>
Subject: Re: [PATCH 8/8] phy: add driver for TI TUSB1210 ULPI PHY
On Fri, Feb 13, 2015 at 04:03:57PM -0600, Felipe Balbi wrote:
> On Fri, Feb 13, 2015 at 02:02:11PM -0800, David Cohen wrote:
> > Hi Felipe,
> >
> > [snip]
> >
> > > diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
> > > index 8d95056..53902ea 100644
> > > --- a/drivers/usb/dwc3/dwc3-pci.c
> > > +++ b/drivers/usb/dwc3/dwc3-pci.c
> > > @@ -21,6 +21,7 @@
> > > #include <linux/slab.h>
> > > #include <linux/pci.h>
> > > #include <linux/platform_device.h>
> > > +#include <linux/gpio/consumer.h>
> > >
> > > #include "platform_data.h"
> > >
> > > @@ -35,6 +36,24 @@
> > >
> > > static int dwc3_pci_quirks(struct pci_dev *pdev)
> > > {
> > > + if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
> > > + pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
> > > + struct gpio_desc *gpio;
> > > +
> > > + gpio = gpiod_get_index(&pdev->dev, "reset", 0);
> > > + if (!IS_ERR(gpio)) {
> > > + gpiod_direction_output(gpio, 0);
> > > + gpiod_set_value_cansleep(gpio, 1);
> > > + gpiod_put(gpio);
> > > + }
> > > + gpio = gpiod_get_index(&pdev->dev, "cs", 1);
> > > + if (!IS_ERR(gpio)) {
> > > + gpiod_direction_output(gpio, 0);
> > > + gpiod_set_value_cansleep(gpio, 1);
> > > + gpiod_put(gpio);
> > > + }
> > > + }
> > > +
> >
> > A lot has been discussed in other branches of this thread.
> >
> > But in resume, this is the last open point to make Heikki's proposal
> > good on my side. If you accept this ugly quirk (but necessary for
> > current BYT-CR products when ULPI bus enumerates phy), everything seems
> > good to me. If you don't accept, we need to figure out a way to get the
> > platform driver code back to give gpio to phy as platform data in a way
> > that it could live together with ULPI bus (BYT-CR needs the ULPI bus too).
>
> Is this needed to *all* Baytrail devices or could we have devices with
> updated firmware which won't need this ? I wonder if we should apply the
> quirk for each known product that actually needs this.
The products that need this quirk will have the gpios on DSDT, otherwise
it won't be there. Except for the order of gpios (CS needs to be enabled
first and it's index 0 AFAIR), the quirk should follow Heikki's logic
here: if gpio isn't found we silently ignore it.
>
> Also, I will only accept the series, after I'm shown logs that it works
> with your known-to-be-broken device.
I can provide that when Heikki resends his patch set.
Br, David
>
> cheers
>
> --
> balbi
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