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Date:	Mon, 23 Feb 2015 14:07:30 -0800
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Arnd Bergmann <arnd@...db.de>,
	Mathieu Olivari <mathieu@...eaurora.org>
CC:	mark.rutland@....com, devicetree@...r.kernel.org,
	linux@....linux.org.uk, linux-watchdog@...r.kernel.org,
	pawel.moll@....com, ijc+devicetree@...lion.org.uk, corbet@....net,
	linux-kernel@...r.kernel.org, standby24x7@...il.com, wim@...ana.be,
	robh+dt@...nel.org, galak@...eaurora.org,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 0/3] arm: msm: Use timer DT node for qcom watchdog config

On 02/23/15 13:35, Arnd Bergmann wrote:
> On Friday 20 February 2015 18:19:33 Mathieu Olivari wrote:
>> This change is done as a follow-up to the following thread:
>> https://lkml.org/lkml/2014/10/1/436
>>
>> qcom-wdt is currently assuming the presence of a dedicated node in DT
>> to gets its configuration. However, on msm architecture, the watchdog is
>> usually part of the timer block. So this patch-set is changing the driver
>> and slightly enhancing the timer DT bindings to provide the relevant clocks
>> and interrupts.
>>
>> Mathieu Olivari (3):
>>   watchdog: qcom: use timer devicetree binding
>>   ARM: qcom: add description of KPSS WDT for IPQ8064
>>   ARM: msm: add watchdog entries to DT timer binding doc
>>
>>  Documentation/devicetree/bindings/arm/msm/timer.txt | 16 +++++++++++++---
>>  arch/arm/boot/dts/qcom-ipq8064.dtsi                 | 14 +++++++++++++-
>>  drivers/watchdog/qcom-wdt.c                         | 21 +++++++++++++++------
>>  3 files changed, 41 insertions(+), 10 deletions(-)
>>
>>
> What about the binding document in
> Documentation/devicetree/bindings/watchdog/qcom-wdt.txt?
>
>

We can rewrite it for platforms starting with msm8974 and beyond or
delete it and write a new binding. It's a similar hardware block split
out from the timers and then made to use a SPI instead of a PPI for the
interrupt sources. We also lost the CPU remapping feature so there is
really only one watchdog instead of 2 per cpu. Oh and the register
offsets are different, but otherwise the registers are the same.

---8<-----

From: Stephen Boyd <sboyd@...eaurora.org>
Subject: [PATCH] Documentation: qcom-wdt: Update binding for individual block

On msm8974 and beyond the KPSS watchdog is split out of the timer
block and made to be a single instance instead of per-cpu. Let's
update the binding to reflect this and replace the binding that
is handled by the qcom,kpss-timer binding.

Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
---
 Documentation/devicetree/bindings/watchdog/qcom-wdt.txt | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.txt b/Documentation/devicetree/bindings/watchdog/qcom-wdt.txt
index 4726924d034e..78b92bec4c3a 100644
--- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.txt
@@ -2,14 +2,10 @@ Qualcomm Krait Processor Sub-system (KPSS) Watchdog
 ---------------------------------------------------
 
 Required properties :
-- compatible : shall contain only one of the following:
-
-			"qcom,kpss-wdt-msm8960"
-			"qcom,kpss-wdt-apq8064"
-			"qcom,kpss-wdt-ipq8064"
-
+- compatible : shall contain "qcom,kpss-wdt"
 - reg : shall contain base register location and length
 - clocks : shall contain the input clock
+- interrupts : shall contain the bark and bite interrupts in that order
 
 Optional properties :
 - timeout-sec : shall contain the default watchdog timeout in seconds,
@@ -17,8 +13,9 @@ Optional properties :
 
 Example:
 	watchdog@...a038 {
-		compatible = "qcom,kpss-wdt-ipq8064";
-		reg = <0x0208a038 0x40>;
+		compatible = "qcom,kpss-wdt";
+		reg = <0xf9017000 0x1000>;
+		interrupts = <0 3 0>, <0 4 0>;
 		clocks = <&sleep_clk>;
 		timeout-sec = <10>;
 	};

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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