linux-kernel - Re: [PATCH 7/9] x86/asm/entry/32: tidy up some instructions

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Message-ID: <CA+55aFweqq2bM7KKJkt1zOWMrDxfu-WVXmCD0Seut3y-o0Bf=w@mail.gmail.com>
Date:	Wed, 1 Apr 2015 15:14:17 -0700
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	Denys Vlasenko <dvlasenk@...hat.com>
Cc:	Brian Gerst <brgerst@...il.com>, Ingo Molnar <mingo@...nel.org>,
	Steven Rostedt <rostedt@...dmis.org>,
	Borislav Petkov <bp@...en8.de>,
	"H. Peter Anvin" <hpa@...or.com>,
	Andy Lutomirski <luto@...capital.net>,
	Oleg Nesterov <oleg@...hat.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Alexei Starovoitov <ast@...mgrid.com>,
	Will Drewry <wad@...omium.org>,
	Kees Cook <keescook@...omium.org>,
	"the arch/x86 maintainers" <x86@...nel.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 7/9] x86/asm/entry/32: tidy up some instructions

On Wed, Apr 1, 2015 at 1:52 PM, Denys Vlasenko <dvlasenk@...hat.com> wrote:
>
> BTW, AMD64 docs do explicitly say that MOVs from segment registers
> to gpregs are zero-extending.

Yeah, I think anything even *remotely* recent enough to do 64-bit does
zero-extending.

Even on the 32-bit side, anything that does register renaming is much
better off with zero-extension than with partial register writes.

And I found the "push" thing. It's actually documented:

  "When pushing a segment selector onto the stack, the Pentium 4,
Intel Xeon, P6 family, and Intel486 processors
decrement the ESP register by the operand size and then write 2 bytes.
If the operand size is 32-bits, the upper
two bytes of the write are not modified"

but I can't find any similar documentation for the "mov
Sreg->register" thing. So now I'm starting to doubt my own memory.

                          Linus
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