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Message-ID: <20150428175735.GG9169@x1>
Date: Tue, 28 Apr 2015 18:57:35 +0100
From: Lee Jones <lee.jones@...aro.org>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-kernel@...r.kernel.org,
Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>
Subject: Re: [PATCH v1 3/3] mfd: Add support for Intel Sunrisepoint LPSS
devices
On Tue, 28 Apr 2015, Mika Westerberg wrote:
> On Tue, Apr 28, 2015 at 02:32:59PM +0100, Lee Jones wrote:
> > On Tue, 31 Mar 2015, Andy Shevchenko wrote:
> >
> > > The new coming Intel platforms such as Skylake will contain Sunrisepoint PCH.
> > > The main difference to the previous platforms is that the LPSS devices are
> > > compound devices where usually main (SPI, HSUART, or I2C) and DMA IPs are
> > > present.
> > >
> > > This patch brings the driver for such devices found on Sunrisepoint PCH.
> >
> > I'm not convinced it's really an MFD. What does this hardware look
> > like? Are the Designware devices really in the same memory/register
> > space as the LPSS registers?
>
> Yes they are - there is only single MMIO BAR per PCI device holding, the
> host controller, iDMA and convergence layer registers.
Are there publicly available docs?
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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