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Date:	Fri, 24 Jul 2015 10:18:29 +0200
From:	Pavel Machek <pavel@...x.de>
To:	atull@...nsource.altera.com
Cc:	gregkh@...uxfoundation.org, jgunthorpe@...idianresearch.com,
	hpa@...or.com, monstr@...str.eu, michal.simek@...inx.com,
	rdunlap@...radead.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, pantelis.antoniou@...sulko.com,
	robh+dt@...nel.org, grant.likely@...aro.org, iws@...o.caltech.edu,
	linux-doc@...r.kernel.org, broonie@...nel.org, philip@...ister.org,
	rubini@...dd.com, s.trumtrar@...gutronix.de, jason@...edaemon.net,
	kyle.teske@...com, nico@...aro.org, balbi@...com,
	m.chehab@...sung.com, davidb@...eaurora.org, rob@...dley.net,
	davem@...emloft.net, cesarb@...arb.net, sameo@...ux.intel.com,
	akpm@...ux-foundation.org, linus.walleij@...aro.org,
	pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	devel@...verdev.osuosl.org, Petr Cvek <petr.cvek@....cz>,
	delicious.quinoa@...il.com, dinguyen@...nsource.altera.com,
	yvanderv@...nsource.altera.com
Subject: Re: [PATCH v9 4/7] staging: fpga manager: add sysfs interface
 document

Hi!

> +What:		/sys/class/fpga_manager/<fpga>/state
> +Date:		July 2015
> +KernelVersion:	4.2
> +Contact:	Alan Tull <atull@...nsource.altera.com>
> +Description:	Read fpga manager state as a string.

fpga->FPGA.

> +		Valid states may vary by manufacturer; superset is:
> +		* unknown		= can't determine state
> +		* power off		= FPGA power is off
> +		* power up		= FPGA reports power is up
> +		* reset			= FPGA held in reset state
> +		* firmware request	= firmware class request in progress
> +		* firmware request error = firmware request failed
> +		* write init		= FPGA being prepared for programming
> +		* write init error	= Error while preparing FPGA for
> +					  programming
> +		* write			= FPGA ready to receive image data
> +		* write error		= Error while programming
> +		* write complete	= Doing post programming steps
> +		* write complete error	= Error while doing post programming
> +		* operating		= FPGA is programmed and operating

This will need some more details. "firmware request" is hardly a
hardware state, does it belong here? Is power off or on while firmware
is being requested? How does the fpga get into power up phase?
Normally, you'd only power it on to do something more with it...?

									Pavel

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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