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Message-ID: <5693CFB2.3090301@maciej.szmigiero.name>
Date:	Mon, 11 Jan 2016 16:52:18 +0100
From:	"Maciej S. Szmigiero" <mail@...iej.szmigiero.name>
To:	Timur Tabi <timur@...i.org>,
	"alsa-devel@...a-project.org" <alsa-devel@...a-project.org>
CC:	Nicolin Chen <nicoleotsuka@...il.com>,
	Xiubo Li <Xiubo.Lee@...il.com>,
	Liam Girdwood <lgirdwood@...il.com>,
	Mark Brown <broonie@...nel.org>,
	"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	Fabio Estevam <festevam@...il.com>,
	Zidan Wang <zidan.wang@...escale.com>
Subject: Re: [PATCH 1/3] ASoC: fsl_ssi: mark SACNT register volatile

Hi Timur,

Thanks for review.

On 10.01.2016 22:33, Timur Tabi wrote:
> Maciej S. Szmigiero wrote:
>> +    regmap_write(regs, CCSR_SSI_SACNT,
>> +            ssi_private->regcache_sacnt);
> 
> So I'm not familiar with all of the regcache features, but I understand this patch.
> I was wondering if it makes sense to write the same exact value that was read previously.
> Isn't it possible for the WR or RD bits to change between fsl_ssi_suspend() and fsl_ssi_resume()?

These bits are only set in fsl_ssi_ac97_{read,write} which then wait 100usecs
before returning. This should be enough for SSI core to finish the relevant
operation and clear the bits again, so theoretically they shouldn't be set
outside these functions.

However, if AC'97 register access is done concurrently with suspend or resume
the read / written reg data might be corrupted.

It looks to me this is indeed possible since SSI PM callbacks are set in its
platform driver struct but ASoC core only calls PM callbacks in snd_soc_dai_driver
(which SSI driver don't set).

If I am correct with this reasoning then these callbacks need to be added to
snd_soc_dai_driver but platform driver ones should still be provided in case
the driver is loaded but the sound card is not yet registered.

I've CCed Zidan since he originally added PM support to this driver.

> That is, should we be doing this instead?
> 
> u32 temp;
> regmap_read(regs, CCSR_SSI_SACNT, &temp);
> temp &= 0x18; // preserve WR and RD
> regmap_write(regs, CCSR_SSI_SACNT, (ssi_private->regcache_sacnt & ~0x18) | temp);
> 

Maciej

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