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Date: Thu, 14 Jan 2016 17:08:30 -0600 From: Aravind Gopalakrishnan <aravind.gopalakrishnan@....com> To: Borislav Petkov <bp@...en8.de> CC: <tony.luck@...el.com>, <tglx@...utronix.de>, <mingo@...hat.com>, <hpa@...or.com>, <x86@...nel.org>, <linux-edac@...r.kernel.org>, <linux-kernel@...r.kernel.org> Subject: Re: [PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank On 1/14/2016 4:53 PM, Borislav Petkov wrote: > On Thu, Jan 14, 2016 at 04:48:22PM -0600, Aravind Gopalakrishnan wrote: >> True. But that BlkPtr logic also will undergo changes as it's interpretation >> for future processors is different. > But there still must be a bit there which says "this register is valid", > like MCi_MISC[63]. There is a bit to say if it's valid or not. > And so I'd very much prefer checking a bit (or bits) instead of relying > on defines. > > But we'd still need to know the last available MISC register for a bank to know when to end the loop right? Currently we loop over all the possible blocks- for (block = 0; block < NR_BLOCKS; ++block) { <code>... increment block address; <code>.. } Here, we know we have to stop at block number 8 as that is the last MISC register that is present for a bank. In the same manner, we'd still have to know the last possible MISC register for future processors.. Thanks, -Aravind.
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