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Date:	Tue, 2 Feb 2016 14:35:36 +0800
From:	Chen-Yu Tsai <wens@...e.org>
To:	Vishnu Patekar <vishnupatekar0510@...il.com>
Cc:	Rob Herring <robh+dt@...nel.org>, Jonathan Corbet <corbet@....net>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	Russell King - ARM Linux <linux@....linux.org.uk>,
	Emilio Lopez <emilio@...pez.com.ar>,
	Jens Kuske <jenskuske@...il.com>,
	Hans De Goede <hdegoede@...hat.com>,
	Chen-Yu Tsai <wens@...e.org>,
	devicetree <devicetree@...r.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	linux-sunxi <linux-sunxi@...glegroups.com>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	Linus Walleij <linus.walleij@...aro.org>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Reinder de Haan <patchesrdh@...as.com>,
	linux-clk <linux-clk@...r.kernel.org>
Subject: Re: [PATCH 09/14] ARM: dts: sun8i-a83t: Add mmc controller nodes

On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar
<vishnupatekar0510@...il.com> wrote:
> A83T mmc is compatible with earliers sunxi socs.
> This adds mmc0, mmc1, and mmc2 controller nodes for A83T.
>
> Signed-off-by: Vishnu Patekar <vishnupatekar0510@...il.com>
> ---
>  arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 57 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index b8c8b60..ac96aa1 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -276,6 +276,63 @@
>                 #size-cells = <1>;
>                 ranges;
>
> +               mmc0: mmc@...0f000 {
> +                       compatible = "allwinner,sun5i-a13-mmc";
> +                       reg = <0x01c0f000 0x1000>;
> +                       clocks = <&bus_gates 8>,
> +                                <&mmc0_clk 0>,
> +                                <&mmc0_clk 1>,
> +                                <&mmc0_clk 2>;
> +                       clock-names = "ahb",
> +                                     "mmc",
> +                                     "output",
> +                                     "sample";
> +                       resets = <&ahb_reset0 8>;
> +                       reset-names = "ahb";
> +                       interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> +                       status = "disabled";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +               };
> +
> +               mmc1: mmc@...10000 {
> +                       compatible = "allwinner,sun5i-a13-mmc";
> +                       reg = <0x01c10000 0x1000>;
> +                       clocks = <&bus_gates 9>,
> +                                <&mmc1_clk 0>,
> +                                <&mmc1_clk 1>,
> +                                <&mmc1_clk 2>;
> +                       clock-names = "ahb",
> +                                     "mmc",
> +                                     "output",
> +                                     "sample";
> +                       resets = <&ahb_reset0 9>;
> +                       reset-names = "ahb";
> +                       interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
> +                       status = "disabled";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +               };
> +
> +               mmc2: mmc@...11000 {
> +                       compatible = "allwinner,sun5i-a13-mmc";
> +                       reg = <0x01c11000 0x1000>;
> +                       clocks = <&bus_gates 10>,
> +                                <&mmc2_clk 0>,
> +                                <&mmc2_clk 1>,
> +                                <&mmc2_clk 2>;
> +                       clock-names = "ahb",
> +                                     "mmc",
> +                                     "output",
> +                                     "sample";
> +                       resets = <&ahb_reset0 10>;
> +                       reset-names = "ahb";
> +                       interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> +                       status = "disabled";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +               };
> +

This patch looks good, except for the reset control I pointed out in
the other patch.

Regards
ChenYu

>                 pio: pinctrl@...20800 {
>                         compatible = "allwinner,sun8i-a83t-pinctrl";
>                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> --
> 1.9.1
>

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