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Message-Id: <1458770712-10880-16-git-send-email-mmcclint@codeaurora.org>
Date: Wed, 23 Mar 2016 17:05:10 -0500
From: Matthew McClintock <mmcclint@...eaurora.org>
To: andy.gross@...aro.org, linux-arm-msm@...r.kernel.org
Cc: qca-upstream.external@....qualcomm.com,
Matthew McClintock <mmcclint@...eaurora.org>,
David Brown <david.brown@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Russell King <linux@....linux.org.uk>,
linux-soc@...r.kernel.org (open list:ARM/QUALCOMM SUPPORT),
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS),
linux-arm-kernel@...ts.infradead.org (moderated list:ARM PORT),
linux-kernel@...r.kernel.org (open list)
Subject: [PATCH 15/17] qcom: ipq4019: add cpu operating points for cpufreq support
This adds some operating points for cpu frequeny scaling
Signed-off-by: Matthew McClintock <mmcclint@...eaurora.org>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 1937edf..db48fd3 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -40,6 +40,14 @@
reg = <0x0>;
clocks = <&gcc GCC_APPS_CLK_SRC>;
clock-frequency = <0>;
+ operating-points = <
+ /* kHz uV (fixed) */
+ 48000 1100000
+ 200000 1100000
+ 500000 1100000
+ 666000 1100000
+ >;
+ clock-latency = <256000>;
};
cpu@1 {
--
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