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Message-id: <5745500C.1060309@samsung.com>
Date:	Wed, 25 May 2016 09:11:08 +0200
From:	Krzysztof Kozlowski <k.kozlowski@...sung.com>
To:	Javier Martinez Canillas <javier@....samsung.com>,
	linux-kernel@...r.kernel.org
Cc:	devicetree@...r.kernel.org, Kukjin Kim <kgene@...nel.org>,
	Michael Turquette <mturquette@...libre.com>,
	Marek Szyprowski <m.szyprowski@...sung.com>,
	Mauro Carvalho Chehab <mchehab@....samsung.com>,
	Shuah Khan <shuahkh@....samsung.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	linux-samsung-soc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	Tomasz Figa <tomasz.figa@...il.com>, linux-clk@...r.kernel.org,
	Nicolas Dufresne <nicolas.dufresne@...labora.com>
Subject: Re: [PATCH 1/2] clk: exynos5420: Set ID for aclk333 gate clock

On 05/24/2016 07:41 PM, Javier Martinez Canillas wrote:
> The aclk333 clock needs to be ungated during the MFC power domain switch,
> so set the clock ID to allow the Exynos power domain logic to lookup this
> clock if is defined in the MFC PD device tree node.
> 
> Signed-off-by: Javier Martinez Canillas <javier@....samsung.com>
> ---
> 
>  drivers/clk/samsung/clk-exynos5420.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Krzysztof Kozlowski <k.kozlowski@...sung.com>

Best regards,
Krzysztof

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