lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <19495840.MdNPOj1Q7K@wuerfel>
Date:	Wed, 08 Jun 2016 22:06:21 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	Marc Zyngier <marc.zyngier@....com>
Cc:	Shawn Lin <shawn.lin@...k-chips.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-rockchip@...ts.infradead.org,
	Heiko Stuebner <heiko@...ech.de>,
	Doug Anderson <dianders@...omium.org>,
	Wenrui Li <wenrui.li@...k-chips.com>,
	Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/2] PCI: Rockchip: Add Rockchip PCIe controller support

On Wednesday, June 8, 2016 10:21:27 AM CEST Marc Zyngier wrote:
> > +     rockchip_pcie_enable_interrupts(port);
> > +     if (!IS_ENABLED(CONFIG_PCI_MSI)) {
> > +             err = rockchip_pcie_init_irq_domain(port);
> > +             if (err < 0)
> > +                     goto err_vpcie;
> 
> Why are you excluding wired interrupts if you have PCI_MSI configured?
> MSI allocation can fail, and wired interrupts become handy....

Also, a lot of drivers don't do MSI and rely on legacy interrupts.

	Arnd

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ