linux-kernel - Re: [PATCH 1/2] ARM: dts: stm32f429: add LSI and LSE clocks

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Message-ID: <57d580c4-5a3c-4ba3-54f1-a26297796394@st.com>
Date:   Fri, 4 Nov 2016 11:16:52 +0100
From:   Gabriel Fernandez <gabriel.fernandez@...com>
To:     Alexandre Torgue <alexandre.torgue@...com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Russell King <linux@...linux.org.uk>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <kernel@...inux.com>
Subject: Re: [PATCH 1/2] ARM: dts: stm32f429: add LSI and LSE clocks

Hi Alexandre,


On 11/04/2016 11:15 AM, Alexandre Torgue wrote:
> Gabriel,
>
> On 11/04/2016 09:52 AM, gabriel.fernandez@...com wrote:
>> From: Gabriel Fernandez <gabriel.fernandez@...com>
>>
>> This patch adds lsi / lse oscillators. These clocks can be use by
>> RTC clocks.
>> The clock drivers needs to disable the power domain write protection 
>> using
>> syscon / regmap to enable these clocks.
>>
>
> Is it the same than you sent in last series ? If yes I will take it 
> directly as review has already been done.
>
Yes

BR

Gabriel.

> regards
> Alex
>
>> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@...com>
>> ---
>>  arch/arm/boot/dts/stm32f429.dtsi | 18 ++++++++++++++++++
>>  1 file changed, 18 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stm32f429.dtsi 
>> b/arch/arm/boot/dts/stm32f429.dtsi
>> index 336ee4f..2700449 100644
>> --- a/arch/arm/boot/dts/stm32f429.dtsi
>> +++ b/arch/arm/boot/dts/stm32f429.dtsi
>> @@ -56,6 +56,18 @@
>>              compatible = "fixed-clock";
>>              clock-frequency = <0>;
>>          };
>> +
>> +        clk-lse {
>> +            #clock-cells = <0>;
>> +            compatible = "fixed-clock";
>> +            clock-frequency = <32768>;
>> +        };
>> +
>> +        clk-lsi {
>> +            #clock-cells = <0>;
>> +            compatible = "fixed-clock";
>> +            clock-frequency = <32000>;
>> +        };
>>      };
>>
>>      soc {
>> @@ -185,6 +197,11 @@
>>              interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, 
>> <23>, <40>, <41>, <42>, <62>, <76>;
>>          };
>>
>> +        pwrcfg: power-config@...07000 {
>> +            compatible = "syscon";
>> +            reg = <0x40007000 0x400>;
>> +        };
>> +
>>          pin-controller {
>>              #address-cells = <1>;
>>              #size-cells = <1>;
>> @@ -340,6 +357,7 @@
>>              compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
>>              reg = <0x40023800 0x400>;
>>              clocks = <&clk_hse>;
>> +            st,syscfg = <&pwrcfg>;
>>          };
>>
>>          dma1: dma-controller@...26000 {
>>