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Message-Id: <1483794313-18195-1-git-send-email-zhengxing@rock-chips.com>
Date: Sat, 7 Jan 2017 21:05:13 +0800
From: Xing Zheng <zhengxing@...k-chips.com>
To: heiko@...ech.de
Cc: dianders@...gle.com, linux-rockchip@...ts.infradead.org,
Xing Zheng <zhengxing@...k-chips.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Douglas Anderson <dianders@...omium.org>,
Caesar Wang <wxt@...k-chips.com>,
Brian Norris <briannorris@...omium.org>,
Shawn Lin <shawn.lin@...k-chips.com>,
Jianqun Xu <jay.xu@...k-chips.com>,
Elaine Zhang <zhangqing@...k-chips.com>,
David Wu <david.wu@...k-chips.com>,
William wu <wulf@...k-chips.com>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: rockchip: add "rockchip,grf" property for RK3399 PMUCRU/CRU
The structure rockchip_clk_provider needs to refer the GRF regmap
in somewhere, if the CRU node has not "rockchip,grf" property,
calling syscon_regmap_lookup_by_phandle will return an invaild GRF
regmap, and the MUXGRF type clock will be not supported.
Therefore, we need to add them.
Signed-off-by: Xing Zheng <zhengxing@...k-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 92b731f..7790634 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1090,6 +1090,7 @@
pmucru: pmu-clock-controller@...50000 {
compatible = "rockchip,rk3399-pmucru";
reg = <0x0 0xff750000 0x0 0x1000>;
+ rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&pmucru PLL_PPLL>;
@@ -1099,6 +1100,7 @@
cru: clock-controller@...60000 {
compatible = "rockchip,rk3399-cru";
reg = <0x0 0xff760000 0x0 0x1000>;
+ rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
--
2.7.4
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