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Message-ID: <20170118182223.GP10531@minitux>
Date: Wed, 18 Jan 2017 10:22:23 -0800
From: Bjorn Andersson <bjorn.andersson@...aro.org>
To: Vivek Gautam <vivek.gautam@...eaurora.org>
Cc: Kishon Vijay Abraham I <kishon@...com>, robh+dt@...nel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
mark.rutland@....com, sboyd@...eaurora.org,
srinivas.kandagatla@...aro.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v4 3/4] dt-bindings: phy: Add support for QMP phy
On Tue 17 Jan 22:54 PST 2017, Vivek Gautam wrote:
> On 01/16/2017 02:19 PM, Kishon Vijay Abraham I wrote:
> > On Tuesday 10 January 2017 04:21 PM, Vivek Gautam wrote:
[..]
> > > + reset-names = "phy", "common", "cfg",
> > > + "lane0", "lane1", "lane2";
> > Each lane has a separate clock, separate reset.. why not create sub-nodes for
> > each lane?
>
> Yes, each lane has separate pipe clock and resets.
> I can have a binding such as written below.
+1
> Does it makes sense to pull in the tx, rx and pcs offsets as well
> to the child node, and iomap the entire address space of the phy ?
>
Note that you don't have to follow the same structure in your device
driver as you describe your hardware in devicetree.
I would suggest that you replace the lane-offset and various lane
specific resources with subnodes, but keep the driver "as is".
Regards,
Bjorn
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