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Message-ID: <20170213102254.GK2843@localhost>
Date:   Mon, 13 Feb 2017 15:52:55 +0530
From:   Vinod Koul <vinod.koul@...el.com>
To:     Jiada Wang <jiada_wang@...tor.com>
Cc:     dan.j.williams@...el.com, dmaengine@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/1] dma: imx-sdma: add 1ms delay to ensure SDMA channel
 is stopped

On Mon, Feb 13, 2017 at 03:30:19PM +0900, Jiada Wang wrote:
> >>+static int sdma_disable_channel_with_delay(struct dma_chan *chan)
> >>+{
> >>+	sdma_disable_channel(chan);
> >>+	mdelay(1);
> >
> >what is the gaurantee that 1ms is fine? Shouldn't you poll the bit to see
> >channel is disabled properly..
> >
> I got the information from NXP (freescale) R&D team,
> according to them, by write '1' to SDMA_H_STATSTOP, only disables
> the related sdma channel (so poll HE bit will indicates the channel
> has been disabled),
> but it cannot ensure SDMA core stop to access modules' FIFO,
> SDMA core may still is running, this is a bug in HW.

Okay b ut you are not doing the HE bit here..??
> 
> regarding if the '1ms' is enough to ensure SDMA core has stopped,
> NXP R&D team mentioned:
> "we should add some delay of one BD SDMA cost time after disable the
> channel bit, the maximum is 1ms"
> so I assume 1ms should work for all cases

At least please document this in changelog and comments in code.

-- 
~Vinod

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