linux-kernel - Re: [PATCH v7 0/3] Cavium ThunderX2 SMMUv3 errata workarounds

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 8 Jun 2017 18:22:43 +0100
From:   Robin Murphy <robin.murphy@....com>
To:     "Rafael J. Wysocki" <rafael@...nel.org>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Lv <lv.zheng@...el.com>
Cc:     Geetha sowjanya <gakula@...iumnetworks.com>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Will Deacon <will.deacon@....com>,
        Hanjun Guo <hanjun.guo@...aro.org>,
        Sudeep Holla <sudeep.holla@....com>,
        "open list:AMD IOMMU (AMD-VI)" <iommu@...ts.linux-foundation.org>,
        Robert Moore <robert.moore@...el.com>,
        Jon Masters <jcm@...hat.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        robert.richter@...ium.com,
        Catalin Marinas <catalin.marinas@....com>,
        Sunil Goutham <sgoutham@...ium.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        ACPI Devel Maling List <linux-acpi@...r.kernel.org>,
        geethasowjanya.akula@...il.com,
        "devel@...ica.org" <devel@...ica.org>, linu.cherian@...ium.com,
        Charles Garcia Tobin <Charles.Garcia-Tobin@....com>,
        Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v7 0/3] Cavium ThunderX2 SMMUv3 errata workarounds

On 08/06/17 18:13, Rafael J. Wysocki wrote:
> On Thu, Jun 8, 2017 at 6:32 PM, Lorenzo Pieralisi
> <lorenzo.pieralisi@....com> wrote:
>> On Tue, May 30, 2017 at 05:33:38PM +0530, Geetha sowjanya wrote:
>>> Cavium ThunderX2 SMMUv3 implementation has two Silicon Erratas.
>>> 1. Errata ID #74
>>>    SMMU register alias Page 1 is not implemented
>>> 2. Errata ID #126
>>>    SMMU doesnt support unique IRQ lines and also MSI for gerror,
>>>    eventq and cmdq-sync
>>>
>>> The following patchset does software workaround for these two erratas.
>>>
>>> This series is based on patchset.
>>> https://www.spinics.net/lists/arm-kernel/msg578443.html
>>
>> Yes so it is not standalone. How are we going to merge these
>> ACPI IORT/ACPICA/SMMU patches - inclusive of:
>>
>> [1] https://www.spinics.net/lists/arm-kernel/msg586458.html
>>
>> Rafael, do ACPICA patches go upstream via the ACPI tree pull request ?
> 
> Not as a rule.
> 
>> To remove dependency on ACPICA changes this series needs updating
>> anyway and for [1] above I think the only solution is for all the
>> patches to go via the ACPI tree (if ACPICA updates go upstream with it).
> 
> I think we may ask Lv to backport the header changes once they have
> been merged into Linux.
> 
> Lv, would that work?

FWIW, I have already sent a PR for the header patch for the new model
IDs to ACPICA upstream. I briefly considered the actual table update as
well, but didn't find time to comprehend the code changes that appeared
to be necessary for that.

Robin.

> 
> Thanks,
> Rafael
>