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Date: Thu, 3 Aug 2017 17:09:57 +0800
From: kbuild test robot <lkp@...el.com>
To: Joe Perches <joe@...ches.com>
Cc: kbuild-all@...org, Gilad Ben-Yossef <gilad@...yossef.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-crypto@...r.kernel.org,
driverdev-devel@...uxdriverproject.org, devel@...verdev.osuosl.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2] staging: ccree: Fix format/argument mismatches
Hi Joe,
[auto build test WARNING on staging/staging-testing]
[also build test WARNING on next-20170803]
[cannot apply to v4.13-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Joe-Perches/staging-ccree-Fix-format-argument-mismatches/20170731-191055
config: m32r-allmodconfig (attached as .config)
compiler: m32r-linux-gcc (GCC) 6.2.0
reproduce:
wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=m32r
All warnings (new ones prefixed by >>):
In file included from include/linux/kernel.h:13:0,
from drivers/staging/ccree/ssi_driver.c:17:
drivers/staging/ccree/ssi_driver.c: In function 'init_cc_regs':
>> drivers/staging/ccree/ssi_driver.c:180:16: warning: format '%X' expects argument of type 'unsigned int', but argument 2 has type 'long unsigned int' [-Wformat=]
SSI_LOG_DEBUG("AXIM_CFG=0x%08X\n", CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG)));
^
include/linux/printk.h:136:11: note: in definition of macro 'no_printk'
printk(fmt, ##__VA_ARGS__); \
^~~
>> drivers/staging/ccree/ssi_driver.c:180:2: note: in expansion of macro 'SSI_LOG_DEBUG'
SSI_LOG_DEBUG("AXIM_CFG=0x%08X\n", CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG)));
^~~~~~~~~~~~~
In file included from drivers/staging/ccree/ssi_driver.c:64:0:
drivers/staging/ccree/ssi_driver.c: In function 'init_cc_resources':
include/linux/kern_levels.h:4:18: warning: format '%X' expects argument of type 'unsigned int', but argument 4 has type 'long unsigned int' [-Wformat=]
#define KERN_SOH "\001" /* ASCII Start Of Header */
^
drivers/staging/ccree/ssi_driver.h:95:9: note: in definition of macro 'SSI_LOG'
printk(level "cc715ree::%s: " format, __func__, ##__VA_ARGS__)
^~~~~
include/linux/kern_levels.h:13:19: note: in expansion of macro 'KERN_SOH'
#define KERN_INFO KERN_SOH "6" /* informational */
^~~~~~~~
drivers/staging/ccree/ssi_driver.c:319:10: note: in expansion of macro 'KERN_INFO'
SSI_LOG(KERN_INFO, "ARM CryptoCell %s Driver: HW version 0x%08X, Driver version %s\n", SSI_DEV_NAME_STR,
^~~~~~~~~
vim +180 drivers/staging/ccree/ssi_driver.c
abefd674 Gilad Ben-Yossef 2017-04-23 @17 #include <linux/kernel.h>
abefd674 Gilad Ben-Yossef 2017-04-23 18 #include <linux/module.h>
abefd674 Gilad Ben-Yossef 2017-04-23 19
abefd674 Gilad Ben-Yossef 2017-04-23 20 #include <linux/crypto.h>
abefd674 Gilad Ben-Yossef 2017-04-23 21 #include <crypto/algapi.h>
abefd674 Gilad Ben-Yossef 2017-04-23 22 #include <crypto/aes.h>
abefd674 Gilad Ben-Yossef 2017-04-23 23 #include <crypto/sha.h>
fe0a1951 Gilad Ben-Yossef 2017-04-23 24 #include <crypto/aead.h>
abefd674 Gilad Ben-Yossef 2017-04-23 25 #include <crypto/authenc.h>
abefd674 Gilad Ben-Yossef 2017-04-23 26 #include <crypto/scatterwalk.h>
302ef8eb Gilad Ben-Yossef 2017-04-23 27 #include <crypto/internal/skcipher.h>
abefd674 Gilad Ben-Yossef 2017-04-23 28
abefd674 Gilad Ben-Yossef 2017-04-23 29 #include <linux/init.h>
abefd674 Gilad Ben-Yossef 2017-04-23 30 #include <linux/moduleparam.h>
abefd674 Gilad Ben-Yossef 2017-04-23 31 #include <linux/types.h>
abefd674 Gilad Ben-Yossef 2017-04-23 32 #include <linux/random.h>
abefd674 Gilad Ben-Yossef 2017-04-23 33 #include <linux/ioport.h>
abefd674 Gilad Ben-Yossef 2017-04-23 34 #include <linux/interrupt.h>
abefd674 Gilad Ben-Yossef 2017-04-23 35 #include <linux/fcntl.h>
abefd674 Gilad Ben-Yossef 2017-04-23 36 #include <linux/poll.h>
abefd674 Gilad Ben-Yossef 2017-04-23 37 #include <linux/proc_fs.h>
abefd674 Gilad Ben-Yossef 2017-04-23 38 #include <linux/mutex.h>
abefd674 Gilad Ben-Yossef 2017-04-23 39 #include <linux/sysctl.h>
abefd674 Gilad Ben-Yossef 2017-04-23 40 #include <linux/fs.h>
abefd674 Gilad Ben-Yossef 2017-04-23 41 #include <linux/cdev.h>
abefd674 Gilad Ben-Yossef 2017-04-23 42 #include <linux/platform_device.h>
abefd674 Gilad Ben-Yossef 2017-04-23 43 #include <linux/mm.h>
abefd674 Gilad Ben-Yossef 2017-04-23 44 #include <linux/delay.h>
abefd674 Gilad Ben-Yossef 2017-04-23 45 #include <linux/dma-mapping.h>
abefd674 Gilad Ben-Yossef 2017-04-23 46 #include <linux/dmapool.h>
abefd674 Gilad Ben-Yossef 2017-04-23 47 #include <linux/list.h>
abefd674 Gilad Ben-Yossef 2017-04-23 48 #include <linux/slab.h>
abefd674 Gilad Ben-Yossef 2017-04-23 49 #include <linux/spinlock.h>
abefd674 Gilad Ben-Yossef 2017-04-23 50 #include <linux/pm.h>
abefd674 Gilad Ben-Yossef 2017-04-23 51
abefd674 Gilad Ben-Yossef 2017-04-23 52 /* cache.h required for L1_CACHE_ALIGN() and cache_line_size() */
abefd674 Gilad Ben-Yossef 2017-04-23 53 #include <linux/cache.h>
abefd674 Gilad Ben-Yossef 2017-04-23 54 #include <linux/io.h>
abefd674 Gilad Ben-Yossef 2017-04-23 55 #include <linux/uaccess.h>
abefd674 Gilad Ben-Yossef 2017-04-23 56 #include <linux/pagemap.h>
abefd674 Gilad Ben-Yossef 2017-04-23 57 #include <linux/sched.h>
abefd674 Gilad Ben-Yossef 2017-04-23 58 #include <linux/random.h>
abefd674 Gilad Ben-Yossef 2017-04-23 59 #include <linux/of.h>
675ef02f Gilad Ben-Yossef 2017-06-25 60 #include <linux/clk.h>
d255b343 Gilad Ben-Yossef 2017-06-25 61 #include <linux/of_address.h>
abefd674 Gilad Ben-Yossef 2017-04-23 62
abefd674 Gilad Ben-Yossef 2017-04-23 63 #include "ssi_config.h"
abefd674 Gilad Ben-Yossef 2017-04-23 64 #include "ssi_driver.h"
abefd674 Gilad Ben-Yossef 2017-04-23 65 #include "ssi_request_mgr.h"
abefd674 Gilad Ben-Yossef 2017-04-23 66 #include "ssi_buffer_mgr.h"
abefd674 Gilad Ben-Yossef 2017-04-23 67 #include "ssi_sysfs.h"
302ef8eb Gilad Ben-Yossef 2017-04-23 68 #include "ssi_cipher.h"
fe0a1951 Gilad Ben-Yossef 2017-04-23 69 #include "ssi_aead.h"
50cfbbb7 Gilad Ben-Yossef 2017-04-23 70 #include "ssi_hash.h"
a4d826b9 Gilad Ben-Yossef 2017-04-23 71 #include "ssi_ivgen.h"
abefd674 Gilad Ben-Yossef 2017-04-23 72 #include "ssi_sram_mgr.h"
abefd674 Gilad Ben-Yossef 2017-04-23 73 #include "ssi_pm.h"
b7e607bf Gilad Ben-Yossef 2017-07-11 74 #include "ssi_fips.h"
abefd674 Gilad Ben-Yossef 2017-04-23 75
abefd674 Gilad Ben-Yossef 2017-04-23 76 #ifdef DX_DUMP_BYTES
a1ab41eb Gilad Ben-Yossef 2017-05-07 77 void dump_byte_array(const char *name, const u8 *the_array, unsigned long size)
abefd674 Gilad Ben-Yossef 2017-04-23 78 {
abefd674 Gilad Ben-Yossef 2017-04-23 79 int i, line_offset = 0, ret = 0;
a1ab41eb Gilad Ben-Yossef 2017-05-07 80 const u8 *cur_byte;
abefd674 Gilad Ben-Yossef 2017-04-23 81 char line_buf[80];
abefd674 Gilad Ben-Yossef 2017-04-23 82
6191eb1d Gilad Ben-Yossef 2017-06-27 83 if (!the_array) {
4a457c17 Gilad Ben-Yossef 2017-07-27 84 SSI_LOG_ERR("cannot dump array - NULL pointer\n");
abefd674 Gilad Ben-Yossef 2017-04-23 85 return;
abefd674 Gilad Ben-Yossef 2017-04-23 86 }
abefd674 Gilad Ben-Yossef 2017-04-23 87
84264234 Simon Sandström 2017-07-02 88 ret = snprintf(line_buf, sizeof(line_buf), "%s[%lu]: ", name, size);
abefd674 Gilad Ben-Yossef 2017-04-23 89 if (ret < 0) {
abefd674 Gilad Ben-Yossef 2017-04-23 90 SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret);
abefd674 Gilad Ben-Yossef 2017-04-23 91 return;
abefd674 Gilad Ben-Yossef 2017-04-23 92 }
abefd674 Gilad Ben-Yossef 2017-04-23 93 line_offset = ret;
abefd674 Gilad Ben-Yossef 2017-04-23 94 for (i = 0, cur_byte = the_array;
abefd674 Gilad Ben-Yossef 2017-04-23 95 (i < size) && (line_offset < sizeof(line_buf)); i++, cur_byte++) {
abefd674 Gilad Ben-Yossef 2017-04-23 96 ret = snprintf(line_buf + line_offset,
abefd674 Gilad Ben-Yossef 2017-04-23 97 sizeof(line_buf) - line_offset,
abefd674 Gilad Ben-Yossef 2017-04-23 98 "0x%02X ", *cur_byte);
abefd674 Gilad Ben-Yossef 2017-04-23 99 if (ret < 0) {
abefd674 Gilad Ben-Yossef 2017-04-23 100 SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret);
abefd674 Gilad Ben-Yossef 2017-04-23 101 return;
abefd674 Gilad Ben-Yossef 2017-04-23 102 }
abefd674 Gilad Ben-Yossef 2017-04-23 103 line_offset += ret;
abefd674 Gilad Ben-Yossef 2017-04-23 104 if (line_offset > 75) { /* Cut before line end */
abefd674 Gilad Ben-Yossef 2017-04-23 105 SSI_LOG_DEBUG("%s\n", line_buf);
abefd674 Gilad Ben-Yossef 2017-04-23 106 line_offset = 0;
abefd674 Gilad Ben-Yossef 2017-04-23 107 }
abefd674 Gilad Ben-Yossef 2017-04-23 108 }
abefd674 Gilad Ben-Yossef 2017-04-23 109
abefd674 Gilad Ben-Yossef 2017-04-23 110 if (line_offset > 0) /* Dump remaining line */
abefd674 Gilad Ben-Yossef 2017-04-23 111 SSI_LOG_DEBUG("%s\n", line_buf);
abefd674 Gilad Ben-Yossef 2017-04-23 112 }
abefd674 Gilad Ben-Yossef 2017-04-23 113 #endif
abefd674 Gilad Ben-Yossef 2017-04-23 114
abefd674 Gilad Ben-Yossef 2017-04-23 115 static irqreturn_t cc_isr(int irq, void *dev_id)
abefd674 Gilad Ben-Yossef 2017-04-23 116 {
abefd674 Gilad Ben-Yossef 2017-04-23 117 struct ssi_drvdata *drvdata = (struct ssi_drvdata *)dev_id;
abefd674 Gilad Ben-Yossef 2017-04-23 118 void __iomem *cc_base = drvdata->cc_base;
a1ab41eb Gilad Ben-Yossef 2017-05-07 119 u32 irr;
a1ab41eb Gilad Ben-Yossef 2017-05-07 120 u32 imr;
abefd674 Gilad Ben-Yossef 2017-04-23 121
abefd674 Gilad Ben-Yossef 2017-04-23 122 /* STAT_OP_TYPE_GENERIC STAT_PHASE_0: Interrupt */
abefd674 Gilad Ben-Yossef 2017-04-23 123
abefd674 Gilad Ben-Yossef 2017-04-23 124 /* read the interrupt status */
abefd674 Gilad Ben-Yossef 2017-04-23 125 irr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR));
abefd674 Gilad Ben-Yossef 2017-04-23 126 SSI_LOG_DEBUG("Got IRR=0x%08X\n", irr);
abefd674 Gilad Ben-Yossef 2017-04-23 127 if (unlikely(irr == 0)) { /* Probably shared interrupt line */
abefd674 Gilad Ben-Yossef 2017-04-23 128 SSI_LOG_ERR("Got interrupt with empty IRR\n");
abefd674 Gilad Ben-Yossef 2017-04-23 129 return IRQ_NONE;
abefd674 Gilad Ben-Yossef 2017-04-23 130 }
abefd674 Gilad Ben-Yossef 2017-04-23 131 imr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR));
abefd674 Gilad Ben-Yossef 2017-04-23 132
abefd674 Gilad Ben-Yossef 2017-04-23 133 /* clear interrupt - must be before processing events */
abefd674 Gilad Ben-Yossef 2017-04-23 134 CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), irr);
abefd674 Gilad Ben-Yossef 2017-04-23 135
abefd674 Gilad Ben-Yossef 2017-04-23 136 drvdata->irq = irr;
abefd674 Gilad Ben-Yossef 2017-04-23 137 /* Completion interrupt - most probable */
abefd674 Gilad Ben-Yossef 2017-04-23 138 if (likely((irr & SSI_COMP_IRQ_MASK) != 0)) {
abefd674 Gilad Ben-Yossef 2017-04-23 139 /* Mask AXI completion interrupt - will be unmasked in Deferred service handler */
abefd674 Gilad Ben-Yossef 2017-04-23 140 CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | SSI_COMP_IRQ_MASK);
abefd674 Gilad Ben-Yossef 2017-04-23 141 irr &= ~SSI_COMP_IRQ_MASK;
abefd674 Gilad Ben-Yossef 2017-04-23 142 complete_request(drvdata);
abefd674 Gilad Ben-Yossef 2017-04-23 143 }
16609980 Gilad Ben-Yossef 2017-04-23 144 #ifdef CC_SUPPORT_FIPS
16609980 Gilad Ben-Yossef 2017-04-23 145 /* TEE FIPS interrupt */
16609980 Gilad Ben-Yossef 2017-04-23 146 if (likely((irr & SSI_GPR0_IRQ_MASK) != 0)) {
16609980 Gilad Ben-Yossef 2017-04-23 147 /* Mask interrupt - will be unmasked in Deferred service handler */
16609980 Gilad Ben-Yossef 2017-04-23 148 CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | SSI_GPR0_IRQ_MASK);
16609980 Gilad Ben-Yossef 2017-04-23 149 irr &= ~SSI_GPR0_IRQ_MASK;
16609980 Gilad Ben-Yossef 2017-04-23 150 fips_handler(drvdata);
16609980 Gilad Ben-Yossef 2017-04-23 151 }
16609980 Gilad Ben-Yossef 2017-04-23 152 #endif
abefd674 Gilad Ben-Yossef 2017-04-23 153 /* AXI error interrupt */
abefd674 Gilad Ben-Yossef 2017-04-23 154 if (unlikely((irr & SSI_AXI_ERR_IRQ_MASK) != 0)) {
a1ab41eb Gilad Ben-Yossef 2017-05-07 155 u32 axi_err;
abefd674 Gilad Ben-Yossef 2017-04-23 156
abefd674 Gilad Ben-Yossef 2017-04-23 157 /* Read the AXI error ID */
abefd674 Gilad Ben-Yossef 2017-04-23 158 axi_err = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_MON_ERR));
abefd674 Gilad Ben-Yossef 2017-04-23 159 SSI_LOG_DEBUG("AXI completion error: axim_mon_err=0x%08X\n", axi_err);
abefd674 Gilad Ben-Yossef 2017-04-23 160
abefd674 Gilad Ben-Yossef 2017-04-23 161 irr &= ~SSI_AXI_ERR_IRQ_MASK;
abefd674 Gilad Ben-Yossef 2017-04-23 162 }
abefd674 Gilad Ben-Yossef 2017-04-23 163
abefd674 Gilad Ben-Yossef 2017-04-23 164 if (unlikely(irr != 0)) {
abefd674 Gilad Ben-Yossef 2017-04-23 165 SSI_LOG_DEBUG("IRR includes unknown cause bits (0x%08X)\n", irr);
abefd674 Gilad Ben-Yossef 2017-04-23 166 /* Just warning */
abefd674 Gilad Ben-Yossef 2017-04-23 167 }
abefd674 Gilad Ben-Yossef 2017-04-23 168
abefd674 Gilad Ben-Yossef 2017-04-23 169 return IRQ_HANDLED;
abefd674 Gilad Ben-Yossef 2017-04-23 170 }
abefd674 Gilad Ben-Yossef 2017-04-23 171
abefd674 Gilad Ben-Yossef 2017-04-23 172 int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
abefd674 Gilad Ben-Yossef 2017-04-23 173 {
d255b343 Gilad Ben-Yossef 2017-06-25 174 unsigned int val, cache_params;
abefd674 Gilad Ben-Yossef 2017-04-23 175 void __iomem *cc_base = drvdata->cc_base;
abefd674 Gilad Ben-Yossef 2017-04-23 176
abefd674 Gilad Ben-Yossef 2017-04-23 177 /* Unmask all AXI interrupt sources AXI_CFG1 register */
abefd674 Gilad Ben-Yossef 2017-04-23 178 val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG));
abefd674 Gilad Ben-Yossef 2017-04-23 179 CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG), val & ~SSI_AXI_IRQ_MASK);
abefd674 Gilad Ben-Yossef 2017-04-23 @180 SSI_LOG_DEBUG("AXIM_CFG=0x%08X\n", CC_HAL_READ_REGISTER(CC_REG_OFFSET(CRY_KERNEL, AXIM_CFG)));
abefd674 Gilad Ben-Yossef 2017-04-23 181
abefd674 Gilad Ben-Yossef 2017-04-23 182 /* Clear all pending interrupts */
abefd674 Gilad Ben-Yossef 2017-04-23 183 val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRR));
abefd674 Gilad Ben-Yossef 2017-04-23 184 SSI_LOG_DEBUG("IRR=0x%08X\n", val);
abefd674 Gilad Ben-Yossef 2017-04-23 185 CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_ICR), val);
abefd674 Gilad Ben-Yossef 2017-04-23 186
abefd674 Gilad Ben-Yossef 2017-04-23 187 /* Unmask relevant interrupt cause */
abefd674 Gilad Ben-Yossef 2017-04-23 188 val = (~(SSI_COMP_IRQ_MASK | SSI_AXI_ERR_IRQ_MASK | SSI_GPR0_IRQ_MASK));
abefd674 Gilad Ben-Yossef 2017-04-23 189 CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), val);
abefd674 Gilad Ben-Yossef 2017-04-23 190
:::::: The code at line 180 was first introduced by commit
:::::: abefd6741d540fc624e73a2a3bdef2397bcbd064 staging: ccree: introduce CryptoCell HW driver
:::::: TO: Gilad Ben-Yossef <gilad@...yossef.com>
:::::: CC: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
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