[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1505725539-6309-5-git-send-email-nickey.yang@rock-chips.com>
Date: Mon, 18 Sep 2017 17:05:37 +0800
From: Nickey Yang <nickey.yang@...k-chips.com>
To: mark.yao@...k-chips.com, robh+dt@...nel.org, heiko@...ech.de,
mark.rutland@....com, airlied@...ux.ie
Cc: linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
linux-rockchip@...ts.infradead.org, seanpaul@...omium.org,
briannorris@...omium.org, hl@...k-chips.com, zyw@...k-chips.com,
bivvy.bi@...k-chips.com, xbl@...k-chips.com,
nickey.yang@...k-chips.com
Subject: [PATCH 5/7] arm64: dts: rockchip: rk3399: Correct MIPI DPHY PLL clock
clk_24m --> Gate11[14] --> clk_mipidphy_ref --> Gate21[0] --> clk_dphy_pll
Signed-off-by: Nickey Yang <nickey.yang@...k-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d79e9b3..6aa43fd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1629,7 +1629,7 @@
compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0x0 0xff960000 0x0 0x8000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
+ clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI0>,
<&cru SCLK_DPHY_TX0_CFG>;
clock-names = "ref", "pclk", "phy_cfg";
power-domains = <&power RK3399_PD_VIO>;
--
1.9.1
Powered by blists - more mailing lists