linux-kernel - Re: [PATCH 7/9] KVM: arm/arm64: vgic-its: free caches when GITS

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Message-ID: <96697f44-9f1d-347c-82dd-bb5b1c6cbdc2@redhat.com>
Date:   Mon, 16 Oct 2017 11:44:05 +0200
From:   Auger Eric <eric.auger@...hat.com>
To:     Christoffer Dall <cdall@...aro.org>
Cc:     eric.auger.pro@...il.com, linux-kernel@...r.kernel.org,
        kvm@...r.kernel.org, marc.zyngier@....com,
        peter.maydell@...aro.org, andre.przywara@....com,
        wanghaibin.wang@...wei.com, wu.wubin@...wei.com
Subject: Re: [PATCH 7/9] KVM: arm/arm64: vgic-its: free caches when GITS_BASER
 Valid bit is cleared

Hi Christoffer,
On 16/10/2017 11:26, Christoffer Dall wrote:
> Hi Eric,
> 
> On Mon, Sep 25, 2017 at 03:34:36PM +0200, Eric Auger wrote:
>> When the GITS_BASER<n>.Valid gets cleared, the data structures in
>> guest RAM are not provisionned anymore. The device, collection
>> and LPI lists stored in the in-kernel ITS represent the same
>> information in some form of cache. So let's void the cache.
> 
> Just a thought.  What about the opposite case, if the BASERs were
> previously not valid, and then become valid, is the ITS expected restore
> the state from memory?
> 
> Thanks,
> -Christoffer
> 
No the spec does not mandate that as far as I understand. Also the spec
does not mandate clearing the cache when BASER moves to invalid (which
this patch does), although this would have madee sense to me. So maybe
we should drop that patch and only clean the cache when the IOCTL is used.

Thanks

Eric