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Message-ID: <2621d6ac-3b5c-7191-02eb-2f4980890d03@redhat.com>
Date:   Tue, 31 Oct 2017 04:42:38 -0400
From:   Jon Masters <jcm@...hat.com>
To:     Ard Biesheuvel <ard.biesheuvel@...aro.org>,
        linux-pci@...r.kernel.org
Cc:     linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Leif Lindholm <leif.lindholm@...aro.org>,
        Graeme Gregory <graeme.gregory@...aro.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Rob Herring <robh@...nel.org>,
        Will Deacon <will.deacon@....com>
Subject: Cleaning up non-standard PCIe ECAM on Arm servers

On 10/06/2017 12:39 PM, Ard Biesheuvel wrote:
> Some implementations of the Synopsys DesignWare PCIe controller implement
> a so-called ECAM shift mode, which allows a static memory window to be
> configured that covers the configuration space of the entire bus range.

Side note that we gave a presentation at Arm TechCon last week with
Cadence about a new program they're offering to perform verification of
PCIe pre-silicon using Palladium with speedbridges and running full
server Operating Systems booting using UEFI/ACPI under emulation. We've
been able to boot RHEL for Arm on these Palladium based platforms for a
while and are collaborating to turn this into a comprehensive program.

Once that was Cadence effort was announced, I pinged Synopsys to ask
them to go clean things up properly for their IP as well. Ultimately
we'll get to all the major IP vendors, and a number of PCIe specific
vendors have already had prodding from me directly over the years. So if
folks see this thread, are in the business of selling PCIe RC IP for Arm
server designs, and we haven't spoken yet, you should ping me. And you
should also talk with smart folks like Ard on how to do this right.

Jon.

-- 
Computer Architect | Sent from my Fedora powered laptop

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