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Message-ID: <29225f25-033b-92d5-2e19-29eb557665d6@amd.com>
Date: Fri, 5 Jan 2018 10:36:40 -0600
From: Tom Lendacky <thomas.lendacky@....com>
To: Brian Gerst <brgerst@...il.com>
Cc: the arch/x86 maintainers <x86@...nel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Peter Zijlstra <peterz@...radead.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Dave Hansen <dave.hansen@...el.com>,
Borislav Petkov <bp@...en8.de>,
Thomas Gleixner <tglx@...utronix.de>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...ux-foundation.org>,
David Woodhouse <dwmw@...zon.co.uk>,
Paul Turner <pjt@...gle.com>
Subject: Re: [PATCH v1 1/3] x86/cpu/AMD: Make LFENCE a serializing instruction
On 1/5/2018 10:35 AM, Brian Gerst wrote:
> On Fri, Jan 5, 2018 at 11:07 AM, Tom Lendacky <thomas.lendacky@....com> wrote:
>> To aid in speculation control, make LFENCE a serializing instruction.
>> This is done by setting bit 1 of MSR 0xc0011029 (DE_CFG). Some families
>> that support LFENCE do not have this MSR. For these families, the LFENCE
>> instruction is already serializing.
>
> Does this require a microcode update?
No, it doesn't.
Thanks,
Tom
>
> --
> Brian Gerst
>
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