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Message-Id: <1516042629-387021-3-git-send-email-kan.liang@intel.com>
Date: Mon, 15 Jan 2018 10:57:04 -0800
From: kan.liang@...el.com
To: tglx@...utronix.de, mingo@...hat.com, peterz@...radead.org,
linux-kernel@...r.kernel.org
Cc: acme@...nel.org, eranian@...gle.com, ak@...ux.intel.com,
Kan Liang <Kan.liang@...el.com>
Subject: [PATCH V5 3/8] perf/x86/intel/uncore: correct fixed counter index check in generic code
From: Kan Liang <Kan.liang@...el.com>
There is no index which is bigger than UNCORE_PMC_IDX_FIXED. The only
exception is client IMC uncore. It has customized function to deal with
the 'UNCORE_PMC_IDX_FIXED + 1' case. It does not touch the generic code.
For generic code, it is not correct to use >= to check fixed counter.
The code quality issue will bring problem when new counter index is
introduced.
Signed-off-by: Kan Liang <Kan.liang@...el.com>
Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
---
Change since V4:
- Add reviewed-by
arch/x86/events/intel/uncore.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index 7874c98..603bf11 100644
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -218,7 +218,7 @@ void uncore_perf_event_update(struct intel_uncore_box *box, struct perf_event *e
u64 prev_count, new_count, delta;
int shift;
- if (event->hw.idx >= UNCORE_PMC_IDX_FIXED)
+ if (event->hw.idx == UNCORE_PMC_IDX_FIXED)
shift = 64 - uncore_fixed_ctr_bits(box);
else
shift = 64 - uncore_perf_ctr_bits(box);
--
2.7.4
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