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Message-ID: <20180125220038.wnmng2sstav4fyzk@pd.tnic>
Date:   Thu, 25 Jan 2018 23:00:39 +0100
From:   Borislav Petkov <bp@...en8.de>
To:     David Woodhouse <dwmw@...zon.co.uk>
Cc:     arjan@...ux.intel.com, tglx@...utronix.de, karahmed@...zon.de,
        x86@...nel.org, linux-kernel@...r.kernel.org,
        tim.c.chen@...ux.intel.com, peterz@...radead.org,
        pbonzini@...hat.com, ak@...ux.intel.com,
        torvalds@...ux-foundation.org, gregkh@...ux-foundation.org,
        dave.hansen@...el.com, gnomes@...rguk.ukuu.org.uk,
        ashok.raj@...el.com, mingo@...nel.org
Subject: Re: [PATCH v5 5/7] x86/pti: Do not enable PTI on processors which
 are not vulnerable to Meltdown

On Thu, Jan 25, 2018 at 04:14:13PM +0000, David Woodhouse wrote:
> Also, for CPUs which don't speculate at all, don't report that they're
> vulnerable to the Spectre variants either.
> 
> Leave the cpu_no_meltdown[] match table with just X86_VENDOR_AMD in it
> for now, even though that could be done with a simple comparison, on the
> assumption that we'll have more to add.
> 
> Based on suggestions from Dave Hansen and Alan Cox.
> 
> Signed-off-by: David Woodhouse <dwmw@...zon.co.uk>
> Reviewed-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
> ---
>  arch/x86/kernel/cpu/common.c | 48 +++++++++++++++++++++++++++++++++++++++-----
>  1 file changed, 43 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index e5d66e9..32650c7 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -47,6 +47,8 @@
>  #include <asm/pat.h>
>  #include <asm/microcode.h>
>  #include <asm/microcode_intel.h>
> +#include <asm/intel-family.h>
> +#include <asm/cpu_device_id.h>
>  
>  #ifdef CONFIG_X86_LOCAL_APIC
>  #include <asm/uv/uv.h>
> @@ -853,6 +855,41 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
>  #endif
>  }
>  
> +static const __initdata struct x86_cpu_id cpu_no_speculation[] = {
> +	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CEDARVIEW, X86_FEATURE_ANY },
> +	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CLOVERVIEW, X86_FEATURE_ANY },
> +	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_LINCROFT, X86_FEATURE_ANY },
> +	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PENWELL, X86_FEATURE_ANY },
> +	{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PINEVIEW, X86_FEATURE_ANY },
> +	{ X86_VENDOR_CENTAUR, 5 },
> +	{ X86_VENDOR_INTEL, 5 },
> +	{ X86_VENDOR_NSC, 5 },
> +	{ X86_VENDOR_ANY, 4 },

You probably wanna retab that one vertically too.

Other than that, looks ok to me.

Reviewed-by: Borislav Petkov <bp@...e.de>

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

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