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Message-ID: <150643f7-b464-0bd0-6ae8-6403b4d34700@redhat.com>
Date: Fri, 16 Mar 2018 15:50:52 +0100
From: Paolo Bonzini <pbonzini@...hat.com>
To: Radim Krcmar <rkrcmar@...hat.com>,
Janakarajan Natarajan <Janakarajan.Natarajan@....com>
Cc: kvm@...r.kernel.org, Borislav Petkov <bp@...en8.de>,
linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H . Peter Anvin" <hpa@...or.com>, Len Brown <len.brown@...el.com>,
Kyle Huey <me@...ehuey.com>,
Tom Lendacky <thomas.lendacky@....com>
Subject: Re: [PATCH v5 1/3] x86/msr: Add AMD Core Perf Extension MSRs
On 06/03/2018 22:03, Radim Krcmar wrote:
>> /* Fam 15h MSRs */
>> #define MSR_F15H_PERF_CTL 0xc0010200
>> +#define MSR_F15H_PERF_CTL0 MSR_F15H_PERF_CTL
>> +#define MSR_F15H_PERF_CTL1 (MSR_F15H_PERF_CTL + 2)
>> +#define MSR_F15H_PERF_CTL2 (MSR_F15H_PERF_CTL + 4)
>> +#define MSR_F15H_PERF_CTL3 (MSR_F15H_PERF_CTL + 6)
>> +#define MSR_F15H_PERF_CTL4 (MSR_F15H_PERF_CTL + 8)
>> +#define MSR_F15H_PERF_CTL5 (MSR_F15H_PERF_CTL + 10)
>> +
>> #define MSR_F15H_PERF_CTR 0xc0010201
>> +#define MSR_F15H_PERF_CTR0 MSR_F15H_PERF_CTR
>> +#define MSR_F15H_PERF_CTR1 (MSR_F15H_PERF_CTR + 2)
>> +#define MSR_F15H_PERF_CTR2 (MSR_F15H_PERF_CTR + 4)
>> +#define MSR_F15H_PERF_CTR3 (MSR_F15H_PERF_CTR + 6)
>> +#define MSR_F15H_PERF_CTR4 (MSR_F15H_PERF_CTR + 8)
>> +#define MSR_F15H_PERF_CTR5 (MSR_F15H_PERF_CTR + 10)
>> +
> x86 maintainers,
>
> are you ok with this going through the kvm tree?
Boris, can you ack these new MSRs?
Thanks,
Paolo
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