linux-kernel - Re: support for non-uniform SPI NOR flash memories

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Message-ID: <b7cbad40-8340-0a8f-e539-932b777757d8@microchip.com>
Date:   Wed, 9 May 2018 19:40:03 +0300
From:   Tudor Ambarus <tudor.ambarus@...rochip.com>
To:     Marek Vasut <marek.vasut@...il.com>,
        Cyrille Pitchen <cyrille.pitchen@...rochip.com>,
        <dwmw2@...radead.org>, <computersforpeace@...il.com>,
        <boris.brezillon@...tlin.com>, <richard@....at>
CC:     <linux-mtd@...ts.infradead.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>
Subject: Re: support for non-uniform SPI NOR flash memories

On 05/07/2018 08:14 PM, Marek Vasut wrote:
> But indeed there are -- to my knowledge -- no flashes with interleaved
> erase blocks. And yes, there could be improvement in erasing exactly the
> required chunk of flash with a fitting opcode:)

Thanks Marek.

Other improvement would be to minimize the amount of erase() calls by
using the best sequence of erase type commands depending on alignment.
But this will increase the number of queries.

I've read again the Sector Map section of the JEDECB standard and it
looks like "overlaid" regions are possible. Here's an example that I
found there:

Bottom: 8x 4KB sectors at bottom (only 4KB erase supported),
         1x overlaid 64KB sector at bottom (only 64KB erase supported),
         511 uniform 64KB sectors (only 64KB erase supported)

That's interesting, when one wants to erase the overlaid 64KB sector, I
guess that the 8x 4KB sectors will be erased too.

I'm still studying this, I'll try to come with a proposal in the next
few days.

Cheers,
ta