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Message-ID: <867e1f69-8b77-ecb0-d4e3-ab0636a49a2e@codeaurora.org>
Date: Tue, 3 Jul 2018 11:49:47 -0400
From: Sinan Kaya <okaya@...eaurora.org>
To: poza@...eaurora.org, Lukas Wunner <lukas@...ner.de>
Cc: linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Bjorn Helgaas <bhelgaas@...gle.com>,
Keith Busch <keith.busch@...el.com>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V5 3/3] PCI: Mask and unmask hotplug interrupts during
reset
On 7/3/2018 11:12 AM, poza@...eaurora.org wrote:
> if (!pci_probe_reset_slot(dev->slot))
> {
> pci_reset_slot(dev->slot)
> result = reset_link(udev, service); >> in this case aer_root_reset must not call pci_reset_bridge_secondary_bus()
> } else
> result = reset_link(udev, service); >> in this case aer_root_reset must call pci_reset_bridge_secondary_bus() [since bridge is not hotplug capable)
Here are two different flow for two different FATAL error sources
dpc_irq
link is down due to DPC
pcie_do_fatal_recovery()
pci_reset_slot()
mask hotplug IRQ
secondary bus reset
unmask hotplug IRQ
undefined behavior as link went down due to DPC
dpc_reset_link()
undefined behavior secondary bus reset happened
while a DPC event is pending
link may or may not be up at this moment
recover the link via DPC way if HW can cope with this undefined behavior.
aer_irq
link is up
pcie_do_fatal_recovery()
pci_reset_slot()
mask hotplug IRQ
secondary bus reset
unmask hotplug IRQ
link goes up
aer_reset_link()
secondary bus reset
hotplug link down interrupt again
I tried to change pci_reset_slot() such that we do
mask hotplug IRQ
go to AER/DPC reset_link based on error source
unmask hotplug IRQ
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
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