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Message-ID: <CACRpkdYi_Zb9T4q5i3-KcFrvZyuhuTw4Ys9zg7mk1VD5S-Myyg@mail.gmail.com>
Date:   Sun, 29 Jul 2018 22:21:22 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Daniel Kurtz <djkurtz@...omium.org>
Cc:     "S-k, Shyam-sundar" <Shyam-sundar.S-k@....com>,
        "Shah, Nehal-bakulchandra" <Nehal-bakulchandra.Shah@....com>,
        Ken Xue <Ken.Xue@....com>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pinctrl/amd: fix gpio irq level in debugfs

On Tue, Jul 17, 2018 at 3:07 AM Daniel Kurtz <djkurtz@...omium.org> wrote:

> According to the AMD BKDG, the GPIO ActiveLevel bits (10:9) map to:
>  00 Active High
>  01 Active Low
>  10 Active on both edges iff LevelTrig (bit 8) == 0
>  11 Reserved
>
> The current code has a bug where it interprets 00 => Active Low, and
> 01 => Active High.
>
> Fix the bug, restrict "Active on both" to just the edge trigger case, and
> refactor a bit to make the logic more readable.
>
> Change-Id: Id7775ae4cb61d193fa7fbb83967a8c5a7cdd0de6

I stripped that off.

> Signed-off-by: Daniel Kurtz <djkurtz@...omium.org>

Patch applied!

Thanks for your fixing and attention to detail!

Yours,
Linus Walleij

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