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Message-ID: <CADRPPNQYPZGPo0y7pv3CFFJH6Kn4rL42w8YgH-d3pMrU=Q0FFQ@mail.gmail.com>
Date: Fri, 14 Sep 2018 18:26:48 -0500
From: Li Yang <leoyang.li@....com>
To: Horia Geanta <horia.geanta@....com>
Cc: Herbert Xu <herbert@...dor.apana.org.au>,
Stuart Yoder <stuyoder@...il.com>,
Laurentiu Tudor <laurentiu.tudor@....com>,
Roy Pledge <roy.pledge@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
David Miller <davem@...emloft.net>, aymen.sghaier@....com,
linux-crypto@...r.kernel.org,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
lkml <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 03/12] soc: fsl: dpio: add frame list format support
On Wed, Sep 12, 2018 at 4:02 AM Horia Geantă <horia.geanta@....com> wrote:
>
> Add support for dpaa2_fd_list format, i.e. dpaa2_fl_entry structure
> and accessors.
>
> Frame list entries (FLEs) are similar, but not identical to FDs:
> + "F" (final) bit
> - FMT[b'01] is reserved
> - DD, SC, DROPP bits (covered by "FD compatibility" field in FLE case)
> - FLC[5:0] not used for stashing
>
> Signed-off-by: Horia Geantă <horia.geanta@....com>
Acked-by: Li Yang <leoyang.li@....com>
> ---
> include/soc/fsl/dpaa2-fd.h | 242 +++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 242 insertions(+)
>
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