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Message-ID: <1a85becb-6cb0-ede4-be0a-2608e8532c9e@wedev4u.fr>
Date: Fri, 28 Sep 2018 18:01:06 +0200
From: Cyrille Pitchen <cyrille.pitchen@...ev4u.fr>
To: Lukasz Majewski <lukma@...x.de>,
Frieder Schrempf <frieder.schrempf@...eet.de>,
boris.brezillon@...tlin.com, Mark Rutland <mark.rutland@....com>
Cc: yogeshnarayan.gaur@....com, richard@....at, broonie@...nel.org,
linux-kernel@...r.kernel.org, Stefan Agner <stefan@...er.ch>,
linux-spi@...r.kernel.org, albert.aribaud@...ev.fr,
prabhakar.kushwaha@....com, linux-mtd@...ts.infradead.org,
david.wolfe@....com, Fabio Estevam <fabio.estevam@....com>,
han.xu@....com, computersforpeace@...il.com,
Fabio Estevam <festevam@...il.com>, dwmw2@...radead.org
Subject: Re: [RFC/RFT PATCH v1 9/9] mtd: spi: Skip reading the Serial Flash
Discoverable Parameters
Hi Lukasz,
Le 27/09/2018 à 00:07, Lukasz Majewski a écrit :
> The fsl-quadspi.c driver is not supporting SPINOR_OP_RDSFDP (0x5a)
> read opcode - in the legacy driver we do read some garbage
> data from AHB mapped area and then return on the first check
If your controller reads garbage then spi_nor_parse_sfdp() fails and exists on the
very first check: signature of the SFDP header. Hence everything should already go on
as if the SPI_NOR_SKIP_SFDP flag is set.
So this patch doesn't change anything for your controller but prevents other controller
from using QSPI protocols like SPI 1-4-4.
This patch introduces a regression for other chips.
Best regards,
Cyrille
> (L2376 @ ./mtd/spi-nor/spi-nor.c)
>
> Signed-off-by: Lukasz Majewski <lukma@...x.de>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 442102be174e..c79b8c33aeeb 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1103,7 +1103,7 @@ static const struct flash_info spi_nor_ids[] = {
> { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) },
> { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) },
> { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) },
> - { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },
> + { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ | SPI_NOR_SKIP_SFDP) },
> { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) },
> { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>
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