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Message-ID: <20181003142758.GC4227@zn.tnic>
Date: Wed, 3 Oct 2018 16:27:59 +0200
From: Borislav Petkov <bp@...en8.de>
To: "Liang, Kan" <kan.liang@...ux.intel.com>
Cc: linux-kernel-owner@...r.kernel.org,
Thomas Gleixner <tglx@...utronix.de>,
Peter Zijlstra <peterz@...radead.org>, mingo@...hat.com,
acme@...nel.org, LKML <linux-kernel@...r.kernel.org>,
eranian@...gle.com, ak@...ux.intel.com,
alexander.shishkin@...ux.intel.com, x86@...nel.org
Subject: Re: [PATCH] perf/x86/intel: Add counter freezing quirk for Goldmont
On Wed, Oct 03, 2018 at 10:25:03AM -0400, Liang, Kan wrote:
>
>
> On 10/3/2018 10:15 AM, linux-kernel-owner@...r.kernel.org wrote:
> > To make it more generic, I think we also need to extend the struct
> > sku_microcode to check vendor and family.
> > The "model" in struct x86_cpu_id is u16. I will also change "model" and
> > "stepping" to u16.
> >
> > struct sku_microcode {
> > u16 vendor;
> > u16 family;
> > u16 model;
> > u16 stepping;
> > u32 microcode;
> > };
>
> No, should be consistent as struct cpuinfo_x86.
> The struct sku_microcode should be
>
> struct sku_microcode {
And drop that "sku_" prefix. Call this a struct microcode_bl_entry or
so, to be clear what it is.
--
Regards/Gruss,
Boris.
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