lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAOLK0py-5AmLwEtLveFAKnM_=hnjsCL18vdAk0n6_NPPyB20bA@mail.gmail.com>
Date:   Thu, 31 Jan 2019 20:02:51 +0800
From:   Tianyu Lan <lantianyu1986@...il.com>
To:     Greg KH <gregkh@...uxfoundation.org>
Cc:     "linux-kernel@...r kernel org" <linux-kernel@...r.kernel.org>,
        "H. Peter Anvin" <hpa@...or.com>, mchehab+samsung@...nel.org,
        sashal@...nel.org, sthemmin@...rosoft.com,
        Joerg Roedel <joro@...tes.org>,
        "the arch/x86 maintainers" <x86@...nel.org>,
        michael.h.kelley@...rosoft.com, Ingo Molnar <mingo@...hat.com>,
        Lan Tianyu <Tianyu.Lan@...rosoft.com>,
        Arnd Bergmann <arnd@...db.de>, haiyangz@...rosoft.com,
        Alex Williamson <alex.williamson@...hat.com>, bp@...en8.de,
        Thomas Gleixner <tglx@...utronix.de>, vkuznets@...hat.com,
        nicolas.ferre@...rochip.com, iommu@...ts.linux-foundation.org,
        devel@...uxdriverproject.org, akpm@...ux-foundation.org,
        davem@...emloft.net
Subject: Re: [PATCH 1/3] x86/Hyper-V: Set x2apic destination mode to physical
 when x2apic is available

Hi Greg:
             Thanks for your review.

On Thu, Jan 31, 2019 at 7:57 PM Greg KH <gregkh@...uxfoundation.org> wrote:
>
> On Thu, Jan 31, 2019 at 06:17:31PM +0800, lantianyu1986@...il.com wrote:
> > From: Lan Tianyu <Tianyu.Lan@...rosoft.com>
> >
> > Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
> > set x2apic destination mode to physcial mode when x2apic is available
> > and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have
> > 8-bit APIC id.
> >
> > Signed-off-by: Lan Tianyu <Tianyu.Lan@...rosoft.com>
> > ---
> >  arch/x86/kernel/cpu/mshyperv.c | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> > index e81a2db..9d62f33 100644
> > --- a/arch/x86/kernel/cpu/mshyperv.c
> > +++ b/arch/x86/kernel/cpu/mshyperv.c
> > @@ -36,6 +36,8 @@
> >  struct ms_hyperv_info ms_hyperv;
> >  EXPORT_SYMBOL_GPL(ms_hyperv);
> >
> > +extern int x2apic_phys;
>
> Shouldn't this be in a .h file somewhere instead?

You are right. I should use <asm/apic.h> here. Thanks.

> thanks,
>
> greg k-h



-- 
Best regards
Tianyu Lan

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ