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Message-Id: <1555016970.28872.0@gmail.com> Date: Fri, 12 Apr 2019 00:09:30 +0300 From: "Leonidas P. Papadakos" <papadakospan@...il.com> To: Robin Murphy <robin.murphy@....com> Cc: Jose Abreu <jose.abreu@...opsys.com>, Philipp Tomsich <philipp.tomsich@...obroma-systems.com>, Heiko Stübner <heiko@...ech.de>, Christoph Müllner <christoph.muellner@...obroma-systems.com>, Maxime Coquelin <mcoquelin.stm32@...il.com>, Alexandre Torgue <alexandre.torgue@...com>, netdev@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>, Linux ARM <linux-arm-kernel@...ts.infradead.org>, Klaus Goger <klaus.goger@...obroma-systems.com> Subject: Re: [PATCH 1/2] stmmac: introduce flag to dynamically disable TX offload for rockchip devices At this point I've settled on snps,txpbl = <0x20> by itself. If I increase the MTU from the default of 1500 I get a stack trace and link reset almost immediately: (https://pastebin.com/raw/5JBtfWei) whether TX Checksumming is ON or OFF. That said, with the default MTU, I get better speeds when TX Checksumming is on and the PBL tweak is set. Is there a better option in the horizon for the near future? At least for the Renegade (the only board I have to test) it can serve as a temporary workaround. Should I make a patch to replace force_thresh_dma_mode with txbpl <0x20> for the Renegade specifically? In any case I would be happy to help as much as I can to figure out if it's a board specific thing, or SoC, or even an issue of the Ethernet device itself.
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