lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 11 Apr 2019 13:16:16 -0700
From:   Stephen Boyd <>
To:     Matthias Brugger <>,
        Nicolas Boichat <>,
        Rob Herring <>,
        Stephen Boyd <>,
        Weiyi Lu <>
Cc:     James Liao <>,
        Fan Chen <>,,,,,,,
        Weiyi Lu <>,
        Owen Chen <>
Subject: Re: [PATCH v5 1/9] clk: mediatek: Disable tuner_en before change PLL rate

Quoting Weiyi Lu (2019-03-04 21:05:38)
> From: Owen Chen <>
> PLLs with tuner_en bit, such as APLL1, need to disable
> tuner_en before apply new frequency settings, or the new frequency
> settings (pcw) will not be applied.
> The tuner_en bit will be disabled during changing PLL rate
> and be restored after new settings applied.
> Fixes: e2f744a82d725 (clk: mediatek: Add MT2712 clock support)
> Cc: <>
> Signed-off-by: Owen Chen <>
> Signed-off-by: Weiyi Lu <>
> ---

Applied to clk-next

Powered by blists - more mailing lists