lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <mhng-c5019c5a-5f6a-43a2-b376-6a29a824e260@palmer-si-x1c4>
Date:   Tue, 16 Apr 2019 10:24:46 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...ive.com>
To:     Linus Torvalds <torvalds@...ux-foundation.org>
CC:     linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: [GIT PULL] RISC-V Patches for 5.1-rc6

The following changes since commit 15ade5d2e7775667cf191cf2f94327a4889f8b9d:

  Linux 5.1-rc4 (2019-04-07 14:09:59 -1000)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git tags/riscv-for-linus-5.1-rc6

for you to fetch changes up to f05badde4e20d2e0f8c39d07a6873b2bfb0754f8:

  RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems (2019-04-10 09:41:40 -0700)

----------------------------------------------------------------
RISC-V Patches for 5.1-rc6

This tag contains an assortment of RISC-V-related fixups that we found
after rc4.  They're all really unrelated:

* The addition of a 32-bit defconfig, to emphasize testing the 32-bit
  port.
* A device tree bindings patch, which is pre-work for some patches that
  target 5.2.
* A fix to support booting on systems with more physical memory than the
  maximum supported by the kernel.

These work for me when merged into Linus' master from this morning,
which has no conflicts.

----------------------------------------------------------------
Anup Patel (2):
      RISC-V: Add separate defconfig for 32bit systems
      RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems

Paul Walmsley (1):
      dt-bindings: clock: sifive: add FU540-C000 PRCI clock constants

 arch/riscv/configs/rv32_defconfig             | 84 +++++++++++++++++++++++++++
 arch/riscv/mm/init.c                          |  8 +++
 include/dt-bindings/clock/sifive-fu540-prci.h | 18 ++++++
 3 files changed, 110 insertions(+)
 create mode 100644 arch/riscv/configs/rv32_defconfig
 create mode 100644 include/dt-bindings/clock/sifive-fu540-prci.h

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ