[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20522585.shqbOC0eQD@jernej-laptop>
Date: Tue, 04 Jun 2019 17:03:55 +0200
From: Jernej Škrabec <jernej.skrabec@...il.com>
To: linux-sunxi@...glegroups.com, megous@...ous.com
Cc: Maxime Ripard <maxime.ripard@...tlin.com>,
Chen-Yu Tsai <wens@...e.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
"moderated list:ARM/Allwinner sunXi SoC support"
<linux-arm-kernel@...ts.infradead.org>,
"open list:COMMON CLK FRAMEWORK" <linux-clk@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [linux-sunxi] [PATCH] clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register
Dne torek, 04. junij 2019 ob 17:00:54 CEST je megous via linux-sunxi
napisal(a):
> From: Ondrej Jirman <megous@...ous.com>
>
> The current code defines W1 clock gate to be at 0x1cc, overlaying it
> with the IR gate.
>
> Clock gate for r-apb1-w1 is at 0x1ec. This fixes issues with IR receiver
> causing interrupt floods on H6 (because interrupt flags can't be cleared,
> due to IR module's bus being disabled).
>
> Signed-off-by: Ondrej Jirman <megous@...ous.com>
You should add Fixes tag and CC stable with this.
Best regards,
Jernej
Powered by blists - more mailing lists