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Message-ID: <CAARK3H=O=h1VDgOMxs_0ThcisrH=2tzpW5pQqt0O9oYs=MFFVw@mail.gmail.com>
Date: Mon, 17 Jun 2019 20:48:33 +0530
From: Sagar Kadam <sagar.kadam@...ive.com>
To: Vignesh Raghavendra <vigneshr@...com>
Cc: marek.vasut@...il.com, tudor.ambarus@...rochip.com,
dwmw2@...radead.org, computersforpeace@...il.com,
miquel.raynal@...tlin.com, richard@....at,
linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org,
Palmer Dabbelt <palmer@...ive.com>, aou@...s.berkeley.edu,
Paul Walmsley <paul.walmsley@...ive.com>,
Wesley Terpstra <wesley@...ive.com>
Subject: Re: [PATCH v5 1/3] mtd: spi-nor: add support for is25wp256
Hello Vignesh,
Thanks for your review comments.
On Sun, Jun 16, 2019 at 6:14 PM Vignesh Raghavendra <vigneshr@...com> wrote:
>
> Hi,
>
> On 12-Jun-19 4:17 PM, Sagar Shrikant Kadam wrote:
> [...]
>
> > @@ -4129,7 +4137,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> > if (ret)
> > return ret;
> >
> > - if (nor->addr_width) {
> > + if (nor->addr_width && JEDEC_MFR(info) != SNOR_MFR_ISSI) {
> > /* already configured from SFDP */
>
> Hmm, why would you want to ignore addr_width that's read from SFDP table?
The SFDP table for ISSI device considered here, has addr_width set to
3 byte, and the flash considered
here is 32MB. With 3 byte address width we won't be able to access
flash memories higher address range.
Hence I have ignored the addr width from SFDP. I have verified that
with 3 byte address width, the
flascp util fails while verifying the written data. Please let me
know your views on this?
BR,
Sagar Kadam
> Regards
> Vignesh
>
>
> > } else if (info->addr_width) {
> > nor->addr_width = info->addr_width;
> > diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> > index b3d360b..ff13297 100644
> > --- a/include/linux/mtd/spi-nor.h
> > +++ b/include/linux/mtd/spi-nor.h
> > @@ -19,6 +19,7 @@
> > #define SNOR_MFR_ATMEL CFI_MFR_ATMEL
> > #define SNOR_MFR_GIGADEVICE 0xc8
> > #define SNOR_MFR_INTEL CFI_MFR_INTEL
> > +#define SNOR_MFR_ISSI 0x9d /* ISSI */
> > #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */
> > #define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */
> > #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
> >
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