linux-kernel - Re: [PATCH 5/5] arm64: dts: imx8mq: add DCSS node

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Message-Id: <20190923165443.D1B1C20882@mail.kernel.org>
Date:   Mon, 23 Sep 2019 09:54:42 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Fabio Estevam <festevam@...il.com>,
        Laurentiu Palcu <laurentiu.palcu@....com>,
        NXP Linux Team <linux-imx@....com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Shawn Guo <shawnguo@...nel.org>
Cc:     devicetree@...r.kernel.org, agx@...xcpu.org,
        linux-kernel@...r.kernel.org,
        Laurentiu Palcu <laurentiu.palcu@....com>,
        linux-arm-kernel@...ts.infradead.org, l.stach@...gutronix.de
Subject: Re: [PATCH 5/5] arm64: dts: imx8mq: add DCSS node

Quoting Laurentiu Palcu (2019-09-23 07:13:19)
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 52aae34..d4aa778 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -871,6 +871,31 @@
>                                 interrupt-controller;
>                                 #interrupt-cells = <1>;
>                         };
> +
> +                       dcss: dcss@...2e00000 {

Drop the 0x prefix on node names.

> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               compatible = "nxp,imx8mq-dcss";
> +                               reg = <0x32e00000 0x2D000>, <0x32e2f000 0x1000>;
> +                               interrupts = <6>, <8>, <9>;
> +                               interrupt-names = "ctx_ld", "ctxld_kick", "vblank";
> +                               interrupt-parent = <&irqsteer>;
> +                               clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
> +                                        <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
> +                                        <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
> +                                        <&clk IMX8MQ_VIDEO2_PLL_OUT>,
> +                                        <&clk IMX8MQ_CLK_DISP_DTRC>;
> +                               clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
> +                               assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>,
> +                                                 <&clk IMX8MQ_CLK_DISP_RTRM>,
> +                                                 <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>;
> +                               assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>,
> +                                                        <&clk IMX8MQ_SYS1_PLL_800M>,
> +                                                        <&clk IMX8MQ_CLK_27M>;
> +                               assigned-clock-rates = <800000000>,
> +                                                          <400000000>;
> +                               status = "disabled";
> +                       };