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Message-ID: <20191129170806.f6gvbpsom74njxpb@linutronix.de>
Date:   Fri, 29 Nov 2019 18:08:06 +0100
From:   'Sebastian Andrzej Siewior' <bigeasy@...utronix.de>
To:     David Laight <David.Laight@...LAB.COM>
Cc:     Barret Rhoden <brho@...gle.com>, Borislav Petkov <bp@...en8.de>,
        Josh Bleecher Snyder <josharian@...il.com>,
        Rik van Riel <riel@...riel.com>,
        "x86@...nel.org" <x86@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, "ian@...s.com" <ian@...s.com>,
        Austin Clements <austin@...gle.com>,
        David Chase <drchase@...ang.org>
Subject: Re: [PATCH v2] x86/fpu: Don't cache access to fpu_fpregs_owner_ctx

On 2019-11-29 16:57:42 [+0000], David Laight wrote:
> Should both fpregs_lock() and fpregs_unlock() contain a barrier() (or "memory" clobber)
> do stop the compiler moving anything across them?

They already do.

> 	David

Sebastian

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