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Message-ID: <AM0PR04MB4481B7D74A1861558523F21488430@AM0PR04MB4481.eurprd04.prod.outlook.com>
Date: Mon, 2 Dec 2019 02:26:13 +0000
From: Peng Fan <peng.fan@....com>
To: Shawn Guo <shawnguo@...nel.org>
CC: "mturquette@...libre.com" <mturquette@...libre.com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
Abel Vesa <abel.vesa@....com>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
dl-linux-imx <linux-imx@....com>,
Anson Huang <anson.huang@....com>,
Jacky Bai <ping.bai@....com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Leonard Crestez <leonard.crestez@....com>
Subject: RE: [PATCH 1/7] clk: imx: clk-pll14xx: Switch to clk_hw based API
Hi Shawn,
> Subject: Re: [PATCH 1/7] clk: imx: clk-pll14xx: Switch to clk_hw based API
>
> On Tue, Oct 29, 2019 at 01:40:54PM +0000, Peng Fan wrote:
> > From: Peng Fan <peng.fan@....com>
> >
> > Switch the imx_clk_pll14xx function to clk_hw based API, rename
> > accordingly and add a macro for clk based legacy. This allows us to
> > move closer to a clear split between consumer and provider clk APIs.
> >
> > Signed-off-by: Peng Fan <peng.fan@....com>
> > ---
> > drivers/clk/imx/clk-pll14xx.c | 22 +++++++++++++---------
> > drivers/clk/imx/clk.h | 8 ++++++--
> > 2 files changed, 19 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/clk/imx/clk-pll14xx.c
> > b/drivers/clk/imx/clk-pll14xx.c index 5c458199060a..fa76e04251c4
> > 100644
> > --- a/drivers/clk/imx/clk-pll14xx.c
> > +++ b/drivers/clk/imx/clk-pll14xx.c
> > @@ -369,13 +369,14 @@ static const struct clk_ops clk_pll1443x_ops = {
> > .set_rate = clk_pll1443x_set_rate,
> > };
> >
> > -struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
> > - void __iomem *base,
> > - const struct imx_pll14xx_clk *pll_clk)
> > +struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char
> *parent_name,
> > + void __iomem *base,
> > + const struct imx_pll14xx_clk *pll_clk)
> > {
> > struct clk_pll14xx *pll;
> > - struct clk *clk;
> > + struct clk_hw *hw;
> > struct clk_init_data init;
> > + int ret;
> > u32 val;
> >
> > pll = kzalloc(sizeof(*pll), GFP_KERNEL); @@ -412,12 +413,15 @@
> > struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
> > val &= ~BYPASS_MASK;
> > writel_relaxed(val, pll->base + GNRL_CTL);
> >
> > - clk = clk_register(NULL, &pll->hw);
> > - if (IS_ERR(clk)) {
> > - pr_err("%s: failed to register pll %s %lu\n",
> > - __func__, name, PTR_ERR(clk));
> > + hw = &pll->hw;
> > +
> > + ret = clk_hw_register(NULL, hw);
> > + if (ret) {
> > + pr_err("%s: failed to register pll %s %d\n",
> > + __func__, name, ret);
> > kfree(pll);
> > + return ERR_PTR(ret);
> > }
> >
> > - return clk;
> > + return hw;
> > }
> > diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index
> > bc5bb6ac8636..5038622f1a72 100644
> > --- a/drivers/clk/imx/clk.h
> > +++ b/drivers/clk/imx/clk.h
> > @@ -97,8 +97,12 @@ extern struct imx_pll14xx_clk imx_1443x_pll;
> > #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \
> > imx_clk_hw_mux(name, reg, shift, width, parents, num_parents)->clk
> >
> > -struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
> > - void __iomem *base, const struct imx_pll14xx_clk *pll_clk);
> > +#define imx_clk_pll14xx(name, parent_name, base, pll_clk) \
> > + imx_clk_hw_pll14xx(name, parent_name, base, pll_clk)->clk
> > +
>
> I would suggest to use an inline function for this, which will be more readable
> and complying to kernel coding style.
ok, I'll send out v2.
Thanks,
Peng.
>
> Shawn
>
> > +struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char
> *parent_name,
> > + void __iomem *base,
> > + const struct imx_pll14xx_clk *pll_clk);
> >
> > struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name,
> > const char *parent, void __iomem *base);
> > --
> > 2.16.4
> >
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