linux-kernel - Re: [PATCHv1 0/3] Enable crypto module on Amlogic GXBB SoC platform

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAFBinCAxq-uW+gsmb-8wqxHGXt2W+4w9iD++2fL=FQ7S-RsAkw@mail.gmail.com>
Date:   Thu, 12 Dec 2019 00:30:15 +0100
From:   Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To:     Anand Moon <moon.linux@...oo.com>
Cc:     Anand Moon <linux.amoon@...il.com>,
        Ard Biesheuvel <ard.biesheuvel@...aro.org>,
        Mark Rutland <mark.rutland@....com>,
        devicetree <devicetree@...r.kernel.org>,
        Herbert Xu <herbert@...dor.apana.org.au>,
        Neil Armstrong <narmstrong@...libre.com>,
        Kevin Hilman <khilman@...libre.com>,
        Linux Kernel <linux-kernel@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Corentin Labbe <clabbe@...libre.com>,
        linux-amlogic@...ts.infradead.org,
        "David S . Miller" <davem@...emloft.net>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        "open list:HARDWARE RANDOM NUMBER GENERATOR CORE" 
        <linux-crypto@...r.kernel.org>
Subject: Re: [PATCHv1 0/3] Enable crypto module on Amlogic GXBB SoC platform

Hi Anand,

On Wed, Dec 11, 2019 at 2:17 PM Anand Moon <moon.linux@...oo.com> wrote:
[...]
> Sorry once again I send my logs too early.
> I still having some issue with the Hardware glx cryto module.
I'm surprised to see that you managed to get the GXL crypto driver to
load at all on GXBB
as far as I know GXBB uses an older crypto IP block (BLKMV) than GXL
(and newer SoCs, called "DMA"): [0]

so my understanding is that a new crypto driver is needed for GXBB
(BLKMV registers) support.
the 32-bit SoCs use the same BLKMV IP block as far as I can tell, so
these would also benefit from this other driver.
(I don't know if anyone is working on a BLKMV crypto driver - all I
can tell is that I'm not working on one)


Martin


[0] https://github.com/khadas/linux/blob/195ea69f96d9bddc1386737e89769ff350762aea/drivers/amlogic/crypto/Kconfig