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Message-ID: <AM0PR04MB4481AF61BEF33C37AC1B20AC88530@AM0PR04MB4481.eurprd04.prod.outlook.com>
Date: Wed, 18 Dec 2019 12:10:53 +0000
From: Peng Fan <peng.fan@....com>
To: Baruch Siach <baruch@...s.co.il>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
CC: "robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
Aisheng Dong <aisheng.dong@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Alice Guo <alice.guo@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH] arm: dts: imx7ulp: fix reg of cpu node
> Subject: Re: [PATCH] arm: dts: imx7ulp: fix reg of cpu node
>
> Hi Peng,
>
> On Wed, Dec 18 2019, Peng Fan wrote:
> > From: Peng Fan <peng.fan@....com>
> >
> > According to arm cpus binding doc,
> > "
> > On 32-bit ARM v7 or later systems this property is
> > required and matches the CPU MPIDR[23:0] register
> > bits.
> >
> > Bits [23:0] in the reg cell must be set to
> > bits [23:0] in MPIDR.
> >
> > All other bits in the reg cell must be set to 0.
> > "
> >
> > In i.MX7ULP, the MPIDR[23:0] is 0xf00, not 0, so fix it.
> > Otherwise there will be warning:
> > "DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map"
> >
> > Fixes: 20434dc92c05 ("ARM: dts: imx: add common imx7ulp dtsi support")
> > Signed-off-by: Peng Fan <peng.fan@....com>
> > ---
> > arch/arm/boot/dts/imx7ulp.dtsi | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/imx7ulp.dtsi
> > b/arch/arm/boot/dts/imx7ulp.dtsi index d37a1927c88e..aa9e50178d6b
> > 100644
> > --- a/arch/arm/boot/dts/imx7ulp.dtsi
> > +++ b/arch/arm/boot/dts/imx7ulp.dtsi
> > @@ -40,7 +40,7 @@
> > cpu0: cpu@0 {
>
> The address suffix in the node name should update to match 'reg'.
Yes, indeed, I will change to "cpu0: cpu@f00".
Thanks,
Peng.
>
> > compatible = "arm,cortex-a7";
> > device_type = "cpu";
> > - reg = <0>;
> > + reg = <0xf00>;
> > };
> > };
>
> baruch
>
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