lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 17 Jan 2020 09:29:45 +0800
From:   Tony W Wang-oc <TonyWWang-oc@...oxin.com>
To:     Thomas Gleixner <tglx@...utronix.de>, <mingo@...hat.com>,
        <bp@...en8.de>, <hpa@...or.com>, <x86@...nel.org>,
        <luto@...nel.org>, <pawan.kumar.gupta@...ux.intel.com>,
        <peterz@...radead.org>, <fenghua.yu@...el.com>,
        <vineela.tummalapalli@...el.com>, <linux-kernel@...r.kernel.org>
CC:     <DavidWang@...oxin.com>, <CooperYan@...oxin.com>,
        <QiyuanWang@...oxin.com>, <HerryYang@...oxin.com>
Subject: Re: [PATCH] x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from
 SPECTRE_V2



On 17/01/2020 01:09, Thomas Gleixner wrote:
> Tony,
> 
> Tony W Wang-oc <TonyWWang-oc@...oxin.com> writes:
> 
>> @@ -1023,6 +1023,7 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
>>  #define MSBDS_ONLY		BIT(5)
>>  #define NO_SWAPGS		BIT(6)
>>  #define NO_ITLB_MULTIHIT	BIT(7)
>> +#define NO_SPECTRE_V2		BIT(8)
>>  
>>  #define VULNWL(_vendor, _family, _model, _whitelist)	\
>>  	{ X86_VENDOR_##_vendor, _family, _model, X86_FEATURE_ANY, _whitelist }
>> @@ -1084,6 +1085,10 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
>>  	/* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */
>>  	VULNWL_AMD(X86_FAMILY_ANY,	NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
>>  	VULNWL_HYGON(X86_FAMILY_ANY,	NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT),
>> +
>> +	/* Zhaoxin Family 7 */
>> +	VULNWL(CENTAUR,	7, X86_MODEL_ANY,	NO_SPECTRE_V2),
>> +	VULNWL(ZHAOXIN,	7, X86_MODEL_ANY,	NO_SPECTRE_V2),
>>  	{}
>>  };
>>  
>> @@ -1116,7 +1121,9 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
>>  		return;
>>  
>>  	setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
>> -	setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
>> +
>> +	if (!cpu_matches(NO_SPECTRE_V2))
>> +		setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
> 
> That's way better. But as you might have noticed yourself this conflicts
> with the other patch which excludes these machines from the SWAPGS bug.
> 
> Granted it's a trivial conflict, but maintainers are not there to mop up
> the mess others create. So the right thing here is to resend both
> patches as a patch series with the conflict properly resolved.
> 

Sorry for this conflict. Will resend these two patches as a patch set.

Sincerely
TonyWWang-oc

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ