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Message-ID: <20200121152433.GW32742@smile.fi.intel.com>
Date: Tue, 21 Jan 2020 17:24:33 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Vipul Kumar <vipulk0511@...il.com>
Cc: Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
linux-kernel@...r.kernel.org, Stable <stable@...r.kernel.org>,
Srikanth Krishnakar <Srikanth_Krishnakar@...tor.com>,
Cedric Hombourger <Cedric_Hombourger@...tor.com>,
x86@...nel.org, Bin Gao <bin.gao@...ux.intel.com>,
Len Brown <len.brown@...el.com>,
Vipul Kumar <vipul_kumar@...tor.com>
Subject: Re: [v3] x86/tsc: Unset TSC_KNOWN_FREQ and TSC_RELIABLE flags on
Intel Bay Trail SoC
On Tue, Jan 21, 2020 at 08:11:57PM +0530, Vipul Kumar wrote:
> From: Vipul Kumar <vipul_kumar@...tor.com>
>
> commit f3a02ecebed7 ("x86/tsc: Set TSC_KNOWN_FREQ and TSC_RELIABLE
> flags on Intel Atom SoCs"), is setting TSC_KNOWN_FREQ and TSC_RELIABLE
> flags for Soc's which is causing time drift on Valleyview/Bay trail Soc.
>
> This patch introduces a new macro to skip these flags.
I guess commit message still needs to provide the measurements
for the both with and without the option being selected.
--
With Best Regards,
Andy Shevchenko
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