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Date:   Tue, 5 May 2020 14:24:23 -0700
From:   Doug Anderson <>
To:     Laurent Pinchart <>
Cc:     Andrzej Hajda <>,
        Neil Armstrong <>,
        Rob Clark <>,
        Sean Paul <>,
        linux-arm-msm <>,
        Daniel Vetter <>,
        David Airlie <>,
        Jernej Skrabec <>,
        Jonas Karlman <>,
        dri-devel <>,
        LKML <>
Subject: Re: [PATCH] drm/bridge: ti-sn65dsi86: Implement lane reordering + polarity


On Tue, May 5, 2020 at 2:14 PM Laurent Pinchart
<> wrote:
> > I'll add this documentation into the comments of the yaml, but I'm not
> > going to try to implement enforcement at the yaml level.
> Why not ? :-)

Because trying to describe anything in the yaml bindings that doesn't
fit in the exact pattern of things that the yaml bindings are designed
to check is like constructing the empire state building with only

If you want to suggest some syntax that would actually make this
doable without blowing out the yaml bindings then I'm happy to add it.
Me being naive would assume that we'd need to do an exhaustive list of
the OK combinations.  That would be fine for the 1-land and 2-lane
cases, but for 4 lanes that means adding 256 entries to the bindings.

I think the correct way to do this would require adding code in the
<> project but that's
really only done for generic subsystem-level concepts and not for a
single driver.


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